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Modeling at a higher level using the C language requires advanced system knowledge and a sense of hardware. Since hardware that operates in parallel will be described linearly, it is important to consider the relationship between the two. At HD Lab, we assist in building an environment for C language design based on the know-how cultivated in large-scale SoC development.

• Other contract services

In recent years, with the large-scale development of LSI, the use of operation synthesis tools has gained attention as a new method for shortening development time. Operation synthesis tools can generate circuits desired by users in a short time from descriptions with higher abstraction than RTL descriptions. Many recent operation synthesis tools support SystemC as an input language, and a path has been established to incorporate SystemC TLM-2.0, which has been used in virtual platforms for system verification, into the operation synthesis environment. This enables the connection between ESL models and operation synthesis designs, and preparations for transitioning from RTL to ESL development methods are underway. In this course, through lectures and exercises, participants will experience an overview and the potential of operation synthesis targeting functional models using SystemC TLM.

• Technical Seminar