Stereo Camera "Stereo Vision IP Suite"

Adoption of the stereo vision algorithm by Associate Professor Masayoshi Jitsuyoshi, a leading expert in in-vehicle stereo cameras research.

The "Stereo Vision IP Suite" is a stereo camera that achieves "flexible customization," "compact design," and "low power consumption" by adopting Intel® FPGA. It makes the application of stereo cameras and the development of embedded systems easier, contributing to reduced development time and cost control of developed products. 【Features】 ■ High-speed processing with FPGA achieves higher frame rates than GPU and DSP ■ Unique correction and calibration algorithms realized with a small-scale circuit ■ Adoption of SAD method to achieve stereo processing with a small-scale circuit ■ Real-time object detection and tracking based on disparity information ■ Regular automatic calibration to account for changes in camera position due to vibration and temperature *For more details, please refer to the PDF materials or feel free to contact us.

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