U.S. Defense Specialty Magazine Awards: "FPGA Workbench"

basic information

FPGA Workbench provides a complete development environment for building customized solutions on our FPGA cards. It includes a powerful GUI for selecting and configuring various pre-developed data acquisition and industry-specific IP cores. The library of functional IP modules includes: - Pulse Width Modulation - Analog I/O - Digital I/O - SENT Protocol - Encoders - Ignition - Injection - Crank/Camshaft - Wheel Speed Sensors - Change State One FPGA Workbench license is required for each FPGA board. Our programmable FPGA PCIe cards support both digital I/O and analog I/O, capable of controlling up to 96 digital I/O signals along with 16 analog inputs and 16 analog outputs. The I/O capabilities of each card can be fully customized by the user using the FPGA Workbench tool. The cards can be used with 362K or 504K logic elements.

Price information

1) Programmable FPGA PCIe Card, 362K CP-FPGA-2 ¥2,155,000 2) Programmable FPGA PCIe Card, 504K CP-FPGA-3 ¥2,547,000 3) FPGA Workbench Software License WU8021-300 ¥391,000 4) Concurrent Real-Time's standard IP cores, 28 types ¥19,000 to ¥293,000 *All prices are excluding tax.

Price range

P6

Delivery Time

※The standard delivery time for iHawk computers is 3 months (delivery times may vary depending on configuration and software setup). Please feel free to contact us.

Applications/Examples of results

Using the mechanism of the FPGA workbench, the following I/O cards have been created by our company: - 64-channel, 18-bit SAR analog input - 32-channel, 24-bit delta-sigma analog input - 32-channel and 8-channel, 18-bit analog output - 12-line pulse width modulation output - 12-line pulse width modulation input - Multifunction 16-channel A/D, 16-channel D/A, 96-line digital - SENT protocol with 12 inputs and 12 outputs - 4-channel universal exhaust gas oxygen (UEGO) - 16-line resistance simulation - State change of 64-channel digital input - 4-line wheel speed sensor - Universal exhaust gas oxygen (UEGO) sensor We have a proven track record in Japan, Germany, and the United States for conducting engine simulations equipped with each signal using a combination of our standard IP cores (crank, cam, ignition, injection).

Detailed information

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  Functions and Specifications: - 16-channel 16-bit DA conversion - Single-ended output - Selection of output range: 0 to +10V, +/- 5V, or +/- 10V - 10 milliamp output drive - 100KHz update per second per channel - 16-channel 16-bit A/D conversion - Differential or single-ended input - +/-5V or +/- 10V input range - Overvoltage protection: +/- 30V - 300K updates per second per channel - 96-channel digital I/O - 5V 4mA TTL (3.3V available) - Digital I/O direction per nibble - High-speed digital isolator - AlterArria V family FPGA with 362K logic elements - 1GB DRAM - TCXO clock source - 8-output programmable clock generator - Industry-standard SCSI 68-pin VHD connector for I/O - RJ-45 connector for multi-board synchronization - PCIe x4 Rev 1.0a, full length, full height (12.3 inches x 3.8 inches) - Isolated power supply for all I/O - Optional NIST traceable calibration

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  FPGA Workbench provides a complete development environment for building customized solutions based on concurrent real-time programmable FPGA cards. FPGA Workbench includes a powerful GUI for selecting and configuring a variety of pre-developed data acquisition and industry-specific modules to meet precise application requirements. The library of functional IP modules includes pulse width modulation, analog I/O, digital I/O, SENT protocol, encoders, ignition, injection, crank/camshaft, wheel speed sensors, and state changes. One FPGA Workbench license is required for each FPGA board.

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  The FPGA workbench requires Intel's Altera Quartus Prime Standard Edition for the Aria V Development software package. Using Altera's tools, cards can be easily customized to meet specific I/O requirements. These tools allow users to develop custom HDL code targeting the Aria V FPGA and integrate it into concurrent real-time FPGA boards. Altera's Qsys tool eliminates manual system integration tasks, enabling developers to focus on designing the necessary custom I/O functions. The Platform Designer (QSYS) system integration tool saves design time and improves productivity by automatically generating interconnection logic that connects intellectual property (IP) functions and subsystems. Additionally, input and output of information during simulation can be done programmatically in a program-free environment on the SIMulation Workbench, or customers can freely program using our C/C++ based API.

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  The FPGA Workbench from Concurrent Real-Time in Pompano Beach, Florida, is a software tool that provides a fully customizable development environment for programmable field-programmable gate array (FPGA) processing cards. The FPGA Workbench was built from the ground up for real-time applications. When combined with Concurrent's FPGA real-time drivers for the RedHawk Linux real-time operating system, the FPGA Workbench becomes a powerful tool for creating real-time models. This enables Concurrent's RedHawk RTOS and FPGA Workbench to serve as solutions for simulation and testing applications in areas such as autonomous driving and flight control, ultimately allowing the industry to bring enhanced products to market quickly and cost-effectively.

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