Implementation and packaging technology of MEMS devices and improvement of reliability.
S11227
★How to enhance reliability in terms of joint distortion and joint strength!? ★Increase reliability through semiconductor integration!
Speaker Part 1: Toshiba Corporation, Research and Development Center, Advanced BEOL Technology Development Department, Responsible Person Part 2: Misuzu Industries Co., Ltd., Responsible Person Part 3: Koga Research Institute Sensor Consultant / Part-time Lecturer at Ibaraki University / Industry-Academia-Government Collaboration Coordinator, Ph.D. Tomo Shimada Target Audience: Engineers and researchers related to MEMS devices and microfabrication processes Venue: Tokyo Chuo Ward Industrial Hall, 4th Floor, Meeting Room 1 [Tokyo, Nihonbashi] Access: 4 minutes from Exit B3 of Higashi-Nihonbashi Station on the JR Toei Asakusa Line, towards Asakusabashi/ Oshiage Date and Time: December 22, 2011 (Thursday) 11:00 AM - 4:00 PM Capacity: 30 people *Registration will close once full. Please apply early. Participation Fee: [Early Bird Discount Price] 51,450 yen (including tax and text fee) for 2 people from one company *Limited to Tech-Zone members who apply by December 8. Membership registration is free. *After December 8, the [Regular Price] will be 54,600 yen (including tax and text fee) for 2 people from one company.
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basic information
**1. Lecture Summary** With the spread of MEMS in consumer applications, there is an increasing demand for miniaturization, cost reduction, and improved productivity. Due to the characteristic of having movable parts, MEMS require special packaging technologies, and their costs have been a concern compared to conventional methods. In recent years, packaging technologies that protect MEMS movable parts at the wafer level have emerged, addressing productivity and cost issues. Additionally, technologies that compensate for challenges related to MEMS devices themselves by integrating semiconductors are becoming mainstream. This lecture will introduce specific examples of the effects of integrating semiconductors with MEMS and cutting-edge packaging technologies based on the premise of semiconductor integration. **2. Purpose of the Course** In this lecture, we believe that there exists a solution for implementation technology that realizes the fusion of MEMS and CMOS by developing it in conjunction with existing LSI implementation element technologies. We will organize the unique requirements of MEMS and provide a clear explanation, including practical examples.
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P2
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P2
Applications/Examples of results
【Program 1】 1. Introduction 1-1 Characteristics of MEMS and its market 1-2 Business areas where semiconductor manufacturers can enter 2. Integration of semiconductors and MEMS (Case study on RF-MEMS variable capacitance) 2-1 What is RF-MEMS variable capacitance? 2-2 Advantages of semiconductor integration: Improved reliability through circuit technology 3. Packaging technology for the integration of semiconductors and MEMS 3-1 Wafer-level packaging technology 3-1-1 Cap wafer stacking technology 3-1-2 In-line WLP thin film dome 3-2 Behavior of MEMS within hermetic sealing 3-3 Integration with semiconductors: Monolithic SoC and MCP 【Program 2】 1. What are MEMS and MEMS packages? 1-1 Functions required for MEMS packages 2. Current status and challenges of MEMS implementation and assembly 2-1 Introduction of representative MEMS package examples 2-2 Challenges of MEMS packages (miniaturization, cost reduction) 3. Trends in MEMS packaging technology 3-1 Optical MEMS (MOEMS) 3-2 Chemical sensors, physical sensors 3-3 Expectations from implementation technology for MEMS device design
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