3D Semiconductor Research Center Collaborative Research and Development Project
It can also be used as a collaborative development space for companies, universities, and public institutions.
The Fukuoka Prefectural Industrial and Scientific Technology Promotion Foundation's 3D Semiconductor Research Center can be used not only for equipment rental but also as a venue for joint development. Currently, material manufacturers, equipment manufacturers, substrate manufacturers, CAD manufacturers, and others are coming together to conduct joint research. Please utilize this center, or collaborate with other users, for various joint research projects. [Features] - Usable as a venue for joint development - Currently, various manufacturers are gathering for ongoing joint research - Can be utilized for various joint research projects For more details, please contact us or download the catalog.
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【Overview】 - In response to requests, we implement measures such as entering into non-disclosure agreements. - Examples of joint development: → Fukuoka University and our center have collaborated to establish a development environment (evaluation kit) that allows for integrated wiring design, process design, material design, prototyping, and evaluation/analysis. - The center's facilities are generally available for joint use. ● For more details, please contact us or download the catalog.
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The Fukuoka Prefectural Industrial and Scientific Technology Promotion Foundation's Three-Dimensional Semiconductor Research Center has facilities that can design, manufacture, test, evaluate, and analyze embedded substrates with active and passive components wired in three dimensions within printed circuit boards at mass production levels. In addition to a standard printed circuit board manufacturing line, it is equipped with mounting devices for embedding components within the substrate and high-temperature, high-humidity vibration testing equipment to evaluate connection reliability. Furthermore, there is an 8-inch silicon wafer line that allows for the development of test element group (TEG) chips for evaluation. Additionally, it is possible to develop three-dimensional stacking of chips using through silicon vias (TSV) and silicon interposers that use silicon substrates instead of printed circuit boards.