Japan's first! The "Ether CAT Master IP" has been born, significantly reducing software load for high-performance SoC FPGAs.
[ Solving CPU Load and Jitter Issues in EtherCAT MASTER Communication ] To allow more users to use it flexibly, we have developed an IP for SoC FPGA. The communication engine using FPGA hardware achieves high-speed communication intervals and stable communication cycles, reducing software load. <Features> ● Automatic packet generation function ● Process communication (cyclic communication) function: 62.5μs and above ● Automatic retransmission function
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Since our establishment in 1984, we have contributed to the information society by leveraging electronics technology, computer technology, and their combined technologies. To meet our customers' expectations, we continuously improve our quality management system and strive daily to acquire new technologies as a "research and development-oriented company," developing products and systems with higher added value. Additionally, we are committed to utilizing human resources with a global perspective and focusing on nurturing individuals with rich imagination and a spirit of adventure. As we enter the 21st century, the core of the multimedia society we aim for is the limitless imagination of people. Computers that weave together and shape human thoughts are themselves "crystals of knowledge," intricately designed and developed to surpass human imagination. NDR will continue to possess the energy to organically transform and respond to the demands of the times by enhancing our technological and informational capabilities.
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