Encryption/decryption engine equipped with three types of key extension functions as standard.
The "AES" is an FPGA IP core for the standard common key encryption/decryption engine based on the AES algorithm. It is a common key block cipher that processes data in 128-bit units, featuring higher security than DES and faster performance than Triple-DES. The algorithm complies with the U.S. Federal Information Processing Standards (NIST FIPS-197). It supports three key lengths: AES-128, AES-192, and AES-256. 【Features】 ■ Compliant with NIST FIPS-197 ■ Encryption/decryption realized in one package ■ Supports ECB/CBC/CTR operation modes ■ Standard key expansion for 128-bit/192-bit/256-bit ■ Achieves a maximum processing speed of approximately 110 Mbps, making it applicable for network security devices *For more details, please refer to the PDF document or feel free to contact us.
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【Scale】 ■FPGA Device ・ALTERA CycloneIII (EP3C10) ■LE Usage ・Approximately 3,000 LEs ・AES_ENG section: Approximately 1,700 LEs / INOUTIV section: Approximately 700 LEs / KEY_EXP section: Approximately 600 LEs ■Required Memory Space ・2 kbit ■Maximum Operating Speed ・40 MHz *For more details, please refer to the PDF document or feel free to contact us.
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For more details, please refer to the PDF document or feel free to contact us.
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Techno Create Co., Ltd. develops and commercializes hardware and software based on reliable communication technology and FPGA technology. We handle various products under our own brand, including "voice band modems" and "in-house line modems." Techno Create supports your company's innovation with solid technology and creativity. If you are considering system development and prototyping with a focus on real-time performance, please feel free to consult with us.
