[Customer Case] Die Bonder Supporting Stacking Implementation of Membrane Chips

We are stacking delicate membrane chips with a post-bonding accuracy of less than 1μm!

The Microelectronics Research Institute in Stuttgart conducts business-oriented research in fields such as silicon technology, application-specific integrated circuits (ASICs), nanostructures, and image sensor technology, and provides specialized training. In new applications, it has become a critical requirement to stack membrane chips of a few centimeters in size with very high precision. After all steps of placement and stacking are completed, the post-bonding accuracy for the entire process must be less than 1μm. This case study introduces a "die bonder compatible with stacking implementation of membrane chips with a post-bonding accuracy of 1μm." *For more detailed information about the case study, please refer to the PDF materials. Feel free to contact us for more details.*

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