Compliant with SMPTE 2059-1/2! Hitless time synchronization is possible through line redundancy.
The "IP_SMPTE2059_SLV" is an IP core for slaves compliant with ST 2059-1/2. There are two types: the vPTPM (Master-Core) on the master side and the vPTPS (Slave-Core) on the slave side, which can be used individually, in multiples, or in combination. Additionally, it has ports for sending and receiving control packets from the MPU bus and is compatible with NMOS, among others. 【Features】 ■ Compliant with SMPTE 2059-1/2 ■ Counter output for PTS ■ 1PPS output ■ Serial output of time information ■ Capable of sending and receiving control packets using the MPU *For more details, please refer to the PDF documentation or feel free to contact us.
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【Other Features】 ■ Capable of generating Video Clock (148.5MHz/148.35MHz) and Video Frame Timing ■ Capable of generating Audio Clock (24.576MHz) and Audio Sample Clock (48MHz) ■ Ethernet lines support GbE/10GbE/25GbE ■ Hitless time synchronization is possible through line redundancy *For more details, please refer to the PDF document or feel free to contact us.
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For more details, please refer to the PDF document or feel free to contact us.
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Media Links LSI Lab, commonly known as M3L, is a technology provider that develops semiconductor IP cores for broadcasting and telecommunications. For over 15 years, we have been involved in Video Over IP (a technology for transmitting uncompressed video using Ethernet) for the broadcasting industry, and we are a global leader in technology and achievements related to this field. We specialize in logical design engineering. Our motto is "Speedy & High Quality," and we strive to assist our customers in achieving success in their businesses.