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日本ローターバッハ

addressKanagawa/Kohoku-ku, Yokohama-shi/4th Floor, Nisso No. 16 Building, 3-8-8 Shin-Yokohama
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last updated:Mar 11, 2025
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Debugging ARM/RISC-V cores Debugging ARM/RISC-V cores
By family By family
By topic By topic
I want to know the basic structure of debugging. I want to know the basic structure of debugging.
I want to know the basic structure of tracing. I want to know the basic structure of tracing.
By

By topic

As we progress with development, various concerns and challenges, both big and small, will arise. You may find hints to clear those concerns and challenges. For the basic structure, please refer to the categories: ▼ "I want to know the basic structure of a debugger" ▼ "I want to know the basic structure of tracing"

Multi-core debugging and tracing made possible by a single debugging system.

Unlimited multicore debugging is possible even with the most complex chips.

◆ Efficient Debugging & Tracing of Popular Multi-Core Systems As various multi-core systems, including homogeneous and heterogeneous cores, become more widespread, software development becomes increasingly challenging as the systems grow in complexity. ◆ With TRACE32 - It is possible to debug and trace applications, operating systems, hypervisors, and other software running on multiple cores on a multi-core system. - More than 150 cores can be debugged, regardless of whether they are homogeneous, heterogeneous, or a combination of both. - It also supports debugging of complex heterogeneous multi-chip systems composed of two or more SoCs. ◆ TRACE32's Proposal In complex systems such as multi-core, traditional Go/Break debugging may be insufficient. Lauterbach suggests utilizing off-chip tracing for such debugging. Off-chip tracing allows for the tracing of multi-core operations without interfering with the running application, enabling all data to be recorded on high-capacity memory on the tracing hardware or streamed to a host, which aids in analyzing the causes of defects and improves development efficiency.

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開発者が見たい“本当の中身”、OS・ハイパーバイザー認識デバッグ

「どのOSを使っていても」「仮想化されていても」、すべてのシステム構成に対して的確なデバッグができるツール

◆複雑なOS環境でも安心!TRACE32のOS認識・ハイパーバイザー認識デバッグとは? 組み込みシステムでは、Linuxのような高機能OSから、リアルタイムOS(RTOS)、AUTOSARベースの専用OSまで様々なOSが存在。複数のOSがハイパーバイザーによって制御されている仮想化システムも増えています。 OSが動作するシステムのデバッグでは、デバッガはOSを認識し、動的に割り振られるリソースを可視化しないと正しくデバッグすることは困難です。そんな複雑なシステムでも、TRACE32は各OSの中身とその動作状況を把握する高度なデバッグ機能を提供しています。 ☆TRACE32が対応できる環境 ・Linux、RTOS、AUTOSARなど80以上のOSをサポート ・各種ハイパーバイザによる複数のOSが動作する仮想化システム。 ◆何ができるの? ・あらゆるOS、ハイパーバイザー環境下でのデバッグ/トレース ・タスク、スレッド、セマフォ、スタック使用量等システムオブジェクトの表示 ・タスクパフォーマンス分析/ネステッド関数ランライム解析 ・コードカバレッジ etc.

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Calibration and Debugging Simultaneously: Techniques for Utilizing the XCP Protocol

Calibration and debugging with just one port. A smart choice for XCP.

◆ What is XCP? In product development involving "control," such as in automobiles and general industrial equipment, there is a process called "calibration." This involves measuring and adjusting internal parameters of the ECU, actuators, and sensors in the state of the final product. XCP (Universal Measurement and Calibration Protocol) is a protocol that realizes this via communication methods such as CAN and Ethernet. ◆ Switching between calibration and debugging is cumbersome! There is a need to perform debugging even in the late stages of development, such as during calibration. However, both processes generally use the same debugging interface for ECU access, which cannot be used simultaneously, necessitating a switch. ◆ No need for switching with XCP debugging! By sending debugging commands over XCP communication in a way that overlays the XCP protocol, calibration and debugging can coexist. This eliminates the hassle of physical exchanges and improves development efficiency. Even with debugging via XCP, many world-class debugging features such as multi-core debugging, OS recognition, and on-chip tracing can be utilized.

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From early development to the actual machine! Improved development efficiency with a seamless interface.

Simulator, emulator, debugger for virtual targets

◆How to efficiently utilize the development period? While software is becoming larger due to increased functionality and performance, the development period tends to remain constant or shorten (resulting in a relatively shorter debugging period). How to effectively utilize the development period is key to improving development efficiency. ◆Consistent debugging interface from the early stages of development By using TRACE32 PowerView, you can utilize a consistent debugging interface from the early stages of development, eliminating the need to learn different interfaces for each phase. ◆Features of TRACE32 - Connects to various third-party development environments such as simulators, emulators, and virtual targets using the debugging interface software "PowerView." - Consistent operability: The debugging interface and script commands remain the same whether in the early simulation phase or during actual hardware debugging after the chip is released. - Script reuse: Scripts created once can be used continuously from simulation environments to actual hardware debugging, mass production, and maintenance.

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A shortcut to obtaining functional safety certification! Tool Qualification Support Kit (TQSK)

Contributing to improved development efficiency and cost reduction!

What is "TQSK," which supports embedded development compliant with functional safety? In safety-critical products (such as automobiles, medical devices, and aircraft), certification of "functional safety" is extremely important. To obtain this certification, it must also be proven that the development tools and system configurations used are appropriate. This is where "TQSK (Tool Qualification Support Kit)" comes into play. It is a support package designed to facilitate the certification of the embedded debugging tool "TRACE32." ☆ What TQSK can do - Support for obtaining functional safety certification - Coverage of major industrial sectors: - Automotive (ISO26262) - Industrial equipment (IEC61508) - Avionics (DO-178C) - Medical (IEC62304) - Railways (EN50128) - Reduction of development process costs and time: Significantly reduces the effort required for tool evaluation and documentation.

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Debugger and trace solutions compatible with FPGA and SoC.

Tools that flexibly fit into the increasingly complex and diverse modern SoC/FPGA-based development environments.

◆ Spread of Core-Integrated FPGA/SoC Examples: - FPGAs equipped with Arm-based CPU cores - Implementation of CPU IP into user logic sections - Custom-developed SoC designs Development tools that can handle complex architectures are essential. ◆ Features of the Flexible and Sophisticated Debugging Tool TRACE32 - In addition to basic debugger functions, it can be expanded as needed - Trace extension (tracking and recording the flow of the program chronologically) - Logic analyzer extension (capable of analyzing correlations with external signals) Used selectively according to development themes - The debugging hardware is designed to be common across all cores → This allows effective utilization of tool assets even in environments dealing with multiple architectures - Flexible response to future device changes → Hardware purchased once can be reused for other devices, allowing for continued use with peace of mind ☆ This tool fits flexibly into the increasingly complex and diverse modern SoC/FPGA-based development environments. With high reusability and configuration freedom, it serves as a "long-lasting development infrastructure," effectively reducing T.C.O (Total Cost of Ownership). You can implement it with confidence.

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Debugging and tracing with one device! All-in-one compatible with Cortex-M.

Affordable professional quality! A companion for Cortex-M development for beginners to veteran developers.

This is a debugger and trace tool designed to facilitate smooth software development for ARM Cortex-M series microcontrollers and processors. ☆ Simple yet high-performance - Integrated debugger and trace functionality: Achieve efficient development with a single system. - While there are limitations on expandability and the size of the built-in trace memory, it offers debugging capabilities that are comparable to high-end models. - Supports debugging of multi-core devices. ☆ Advanced trace support - Supports up to 4-pin parallel trace ports: Visualize complex processes! - Simultaneously check software operations and external signals: Enables detailed analysis in conjunction with a logic analyzer. ☆ Representative products featuring Arm Cortex-M cores - Renesas: RA family - ST Micro: STM32 family - Infineon: XMC1000/4000/7000 - NXP: LPC series, Kinetis series, i.MXRT1100/1000 series, and many others.

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Instruction Set Simulator (ISS)

You can start the preliminary development of the software before the chips come out!

◆What is an Instruction Set Simulator (ISS)? It is software that simulates the core instruction execution behavior. It is useful for verification and unit testing in the early stages of development before the target hardware is completed. ◆Features of ISS - Supports various cores - Arm Cortex - RISC-V - Infineon TricoreAurix - Renesas RH850, SH, RX, RL78, and many other cores - Allows the addition of simulation models for peripheral functions to the simulator through a dedicated API. - For some cores, simulators for cache, MMU, and timers are integrated, enabling the execution of complex operating systems on the simulator. - Fully utilizes/evaluates the debugging functions of the debugging interface software PowerView. ◆Usage Scenarios for ISS - For early-stage development - As a supplement in multi-person development where debugging hardware cannot be provided for everyone - To evaluate the debugging functions of TRACE32 using the free version of ISS before introducing a debugger.

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Logic Analyzer Extension "MixedSignalProbe"

Record digital and analog signals, and enhance efficiency by linking them to the program flow!

◆What is the Mixed Signal Probe, a Logic Analyzer Extension? The logic analyzer extension is a tool used to extend the trace products of Lauterbach. By synchronously measuring the "signal movements" outside the system and the execution state inside the chip, it allows for the visualization of processing discrepancies/delays and power consumption. Tasks that were previously difficult to measure and analyze with general logic analyzers or oscilloscopes become easier. ◆Features of the Mixed Signal Probe - Measures digital signals and analog signals (voltage/current) - Records signals synchronized with the program flow of internal traces, visualizing them on the same time axis in the GUI - Visualizes power consumption during function execution by measuring the current and voltage of the chip's power lines - Can also be used as a protocol analyzer for RS-232C, CAN, I2C, SPI, JTAG, etc. ◆Basic Configuration 1) PowerDebug + PowerTrace/CombiProbe + Mixed Signal Probe 2) μTrace + Mixed Signal Probe

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