富士ソフト List of Products and Services

We would like to introduce the 'Agilex 7 R24C SoC FPGA SOM iW-RainboW-G51M' that we handle. With enhanced bfloat16 and a maximum digital signal processing (DSP) performance of 25 TFLOPS (FP16), it achieves high performance per watt. The design optimization features significantly improve fMAX performance compared to the previous generation high-end Intel FPGAs. 【Features (partial)】 ■Quad ARM Cortex A53 Processor ■R24C Package With 2 x F-Tile ■32GB eMMC (Expandable) ■8GB DDR4 with ECC for HPS (64bit + 8bit) ■8GB DDR4 with ECC for FPGA (64bit + 8bit) *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

Fujisoft is the domestic retailer for the 'iW-RainboW-G22M'. Equipped with a Video Codec module and a 3D Graphics Engine. This product is certified under the JSS-55555 Environmental test. With extensive experience in embedded development, Fujisoft provides a reliable support system that ensures peace of mind both before and after purchase. 【Overview and Features】 ■ Dual ARM Cortex-A7 MPCore @ 1GHz ■ Audio & Video Interfaces ■ Video Codec module ■ 3D Graphics Engine ■ SODIMM standard compatibility *For more details, please refer to the related links or feel free to contact us.

• Industrial PCs
• Embedded Board Computers
• Embedded OS

We would like to introduce the 'Virtex UltraScale+ FPGA SOM iW-RainboW-G52M' that we handle. AMD's third-generation 3D IC adopts Stacked Silicon Interconnect (SSI) technology to achieve excellent performance beyond Moore's Law, providing the highest level of signal processing performance and serial I/O bandwidth to meet stringent design requirements. Additionally, it offers registered wiring lines between dies, enabling operation above 600MHz with richer and more flexible clocking, thus providing a virtual monolithic design environment. 【Overview and Features】 ■ Xilinx Virtex UltraScale+ FPGA with B2104 package ■ Dual 4GB FPGA DDR4 with ECC (64bit + 8bit) ■ 2GB DDR4 for FPGA (32bit) ■ 76 FPGA GTY High-Speed Transceiver channels up to 32.75Gbps *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'i.MX 91 OSM-LF LGA Module iW-RainboW-G50M' that we handle. This platform, which excels in scalability and reliability, streamlines the development of cost-effective edge devices that require security, performance, and Linux support. The NXP i.MX 91 family enables rapid development of new Linux-based edge devices for applications such as home controllers, connected appliances, home entertainment, industrial scanning/printing, building management, EV chargers, and medical platforms. 【Features (partial)】 ■ i.MX 91 CPU with 64-bit ARM v8.2-A Architecture ■ 2GB LPDDR4 Memory ■ 16GB eMMC Flash (Expandable) ■ Wi-Fi 6, Bluetooth 5.3 & IEEE802.15.4 Connectivity ■ Supports 1 x Cortex-A55 cores *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'i.MX 95 SMARC SOM iW-RainboW-G61M' that we handle. It enables a wide range of edge applications, from in-vehicle connectivity domains and electronic cockpits to Industry 4.0 and IoT platforms. This family includes an NXP SafeAssure functionally safe compatible platform development (ASIL-B, SIL2), six Arm Cortex-A55 cores, an Arm Mali GPU, a 4K VPU, an ISP, an ML acceleration NPU, and Edgelock secure enclave security. [Features (partial)] ■ i.MX 95 CPU with Six Cortex-A55 cores operating up to 2.0 GHz ■ NPU with up to 2.0 TOP/s Neural Network performance *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'i.MX 93 OSM-LF LGA Module iW-RainboW-G50M' that we handle. It provides efficient machine learning (ML) acceleration and advanced security through the built-in EdgeLock secure enclave, supporting energy-efficient edge computing. By incorporating scalable Arm Cortex-A55 cores within the i.MX portfolio, it enhances the performance and energy efficiency of Linux-based edge applications. 【Features (partial)】 ■ i.MX 93 CPU with 64-bit ARM v8.2-A Architecture ■ NPU with up to 0.5 TOP/s Neural Network performance ■ Wi-Fi 6, Bluetooth 5.3 & IEEE802.15.4 connectivity ■ Supports Cortex-A55 cores *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'i.MX 93 SMARC SOM iW-RainboW-G50M' that we handle. By incorporating a scalable Arm Cortex-A55 core within the i.MX portfolio, it enhances the performance and energy efficiency of Linux-based edge applications. Additionally, it is equipped with the Arm Ethos-U65 microNPU, enabling high-performance, cost-effective, and energy-efficient ML applications. 【Features (partial)】 ■ i.MX 93 CPU with 64-bit ARM v8.2-A Architecture ■ NPU with up to 0.5 TOP/s Neural Network performance ■ IEEE 802.11b/g/n/ac/ax Wi-Fi & Bluetooth 5.3 ■ Supports Cortex-A55 cores *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'i.MX 93 SODIMM SOM iW-RainboW-G50M' that we handle. It provides efficient machine learning (ML) acceleration and advanced security through the built-in EdgeLock Secure Enclave, supporting energy-efficient edge computing. Additionally, it is equipped with the Arm Ethos-U65 microNPU, enabling high-performance, cost-effective, and energy-efficient ML applications. 【Features (partial)】 ■ i.MX 93 CPU with 64-bit ARM v8.2-A Architecture ■ NPU with up to 0.5 TOP/s Neural Network performance ■ IEEE 802.11b/g/n/ac/ax Wi-Fi & Bluetooth 5.3 ■ Supports Cortex-A55 cores ■ Supports 1 × 1Gbps Ethernet *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'i.MX 93 Pico ITX SBC iW-RainboW-G50S' that we handle. Equipped with the Arm Ethos-U65 microNPU, it enables high-performance, cost-effective, and energy-efficient ML applications. By incorporating a scalable Arm Cortex-A55 core within the i.MX portfolio, it enhances the performance and energy efficiency of Linux-based edge applications. 【Features (partial)】 ■ i.MX 93 CPU with 64-bit ARM v8.2-A Architecture ■ 2GB LPDDR4/4X memory and 16GB eMMC Flash ■ NPU with up to 0.5 TOP/s Neural Network performance ■ Wi-Fi 6, Bluetooth 5.3 & IEEE802.15.4 connectivity ■ Supports Dual Cortex-A55 cores *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'Agilex 5 SoC FPGA SOM iW-RainboW-G58M' that we handle. It achieves excellent power efficiency performance with 1.6 times the performance per watt compared to competing products with 16nm FPGA, improving HPS energy efficiency with the first asymmetric Arm application processor cluster. With a wide range of IP sets and connection options covering a broad density range (50KLE-656KLE), it meets the diverse application needs and allows scaling of device size to accommodate various I/O standards for edge and embedded sensors that can be configured with a single FPGA device. [Features (partial)] ■ Agilex 5 E-Series family with B32A Package ■ Dual-core 64-bit Arm Cortex-A76 up to 1.8 GHz ■ Dual-core 64-bit Arm Cortex-A55 up to 1.5 GHz *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'Agilex 7 SoC FPGA SOM iW-RainboW-G43M' that we handle. It features an enhanced 200G (half-duplex communication) encryption core with MACsec IP supporting AES-GCM encryption/decryption, protecting network traffic. With enhanced bfloat16 and up to 25 TFLOPS of digital signal processing (DSP) performance (FP16), it achieves high performance per watt. 【Features (partial)】 ■ Quad ARM Cortex A53 Processor ■ R31B/R31C Package With 4 x F-Tile ■ 32GB eMMC (Expandable) ■ 8GB DDR4 with ECC for HPS (64bit + 8bit) ■ 2 x 8GB DDR4 with ECC for FPGA (64bit + 8bit) *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'Versal Premium SOM iW-RainboW-G63M' that we handle. It is designed for demanding computing and data movement applications and is equipped with one of the world's largest adaptive SoCs. On a cutting-edge software programmable adaptive SoC platform, it combines programmable logic, DSP engines, AI engines, and application-specific IP. 【Features (partial)】 ■ Versal Premium SoC with VSVA2785 package ■ Compatible with VP1552, VP1502, VP1402, VP1202, and VP1102 Devices ■ Dual-core Arm Cortex-A72 and Cortex R5F ■ 64-bit, 4GB LPDDR4 from PS ■ Dual 64bit, 4GB LPDDR4 from PL *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'RZ/G2L SMARC SOM iW-RainboW-G56M' that we handle. It is equipped with a Cortex-A55 (1.2 GHz) CPU, a 16-bit DDR3L/DDR4 interface, an Arm Mali-G31 3D graphics engine, and an integrated video codec (H.264). Additionally, it features many interfaces such as camera input, display output, USB 2.0, and Gbit-Ether, making it suitable for applications such as human-machine interfaces (HMI) for entry-level industrial use and embedded devices with video functionality. 【Features】 ■ Equipped with 64-bit ARM v8.2A & v8-M architecture ■ Supports dual Cortex-A55 and single Cortex-M33 ■ Dual Gigabit Ethernet support ■ Up to 4GB of DDR4 memory ■ Multi-display and camera support ■ SMARC v2.1.1 compatible SOM *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

The "Renesas RZ/V2L SMARC SOM iW-RainboW-G56M" is a product equipped with a Cortex-A55 (1.2 GHz) CPU and incorporates Renesas' proprietary technology, the vision-oriented AI accelerator "DRP-AI," which is composed of DRP and AI-MAC. Thanks to the high power performance characteristic of DRP-AI, there is no need for heat dissipation measures such as heat sinks or cooling fans. This allows for cost-effective utilization of AI in a wide range of application devices, including home appliances, industrial equipment, and retail POS systems. Additionally, by enabling DRP-AI to handle both AI inference and essential image processing for camera applications, such as color correction and noise reduction, vision AI can be realized without the need for an external ISP (Image Signal Processor). 【Features (partial)】 ■ Equipped with 64-bit ARM v8.2A and v8-M architecture ■ Supports dual Cortex-A55 and single Cortex-M33 ■ Renesas' proprietary DRP-AI accelerates AI processing *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'Renesas RZ/G2UL or RZ/A3UL or RZ/Five based OSM-MF LGA Module iW-RainboW-G53M' that we handle. It is equipped with a Cortex-A55 (1.0 GHz) CPU and a 16-bit DDR3L/DDR4 interface, and it has a simple LCD controller built-in. Additionally, it features many interfaces such as camera input, display output, USB 2.0, and Gbit-Ether, making it suitable for applications like entry-level industrial gateway control devices and devices with simple GUI functions. 【Features (partial)】 ■ RZ/G2UL or RZ/A3UL SoC with 64-bit ARMv8.2A ■ RZ/5 SoC with AndeStar V5 instruction set architecture ■ 1GB DDR4 memory (expandable based on chip availability) ■ Supports Cortex-A55 core (RZ/G2UL and RZ/A3UL) *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the "ZU48/ZU47/ZU43/ZU28/ZU27/ZU25DR–Zynq UltraScale+ RFSoC System on Module iW-RainboW-G60M" that we handle. It is equipped with a quad-core Cortex-A53 CPU and dual Cortex-R5F CPUs, along with 8GB DDR4 RAM with ECC, 32GB eMMC flash, and 256MB QSPI flash. Additionally, it offers high-performance features such as up to 930k logic cells, 16xPL-GTY transceivers (up to 28.21Gbps), 8-channel ADC (up to 5Gsps), and 8-channel DAC (up to 9.85Gsps), and it can operate in a temperature range of -40°C to +85°C. 【Features (partial)】 ■ Zynq Ultrascale+ RFSoC family with FFVG1517 Package ■ Compatible with 48/47/43/28/27/25DR devices *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the 'ZU15/ZU9/ZU6- Zynq UltraScale+ MPSoC System on Module iW-RainboW-G65M' that we handle. It offers 16 x GTH transceivers (up to 16.3Gbps) and various interfaces (such as Gigabit Ethernet, USB 2.0 OTG), and supports an operating temperature range of -20°C to +85°C. As a result, it is an ideal module for vertical markets such as industrial, medical, automotive, and aerospace. 【Features (partial)】 ■ Compatible with AU25P/20P/15P/10P ■ Up to 308K Logic cells & 141K LUTs ■ 16 channels of GTY transceivers up to 16.375Gbps ■ 72 LVDS Pairs and 66 SE PL IOs *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

We would like to introduce the "Zynq UltraScale+ MPSoC ZU5/ZU4/ZU3T/ZU3/ZU2/ZU1 System on Module iW-RainboW-G36M" that we handle. It features high-speed 4-lane GTH transceivers (up to 12.5Gbps) and various interfaces (such as Gigabit Ethernet and USB 2.0 OTG), and supports an operating temperature range of -40°C to +85°C. Equipped with a quad-core Arm Cortex-A53 CPU @1.5GHz, a dual-core Arm Cortex-R5 CPU @600MHz, and an Arm Mali-400MP2 GPU, it includes 4GB PS DDR4 RAM with ECC (expandable up to 8GB) and 2GB PL DDR4 RAM (expandable up to 16GB). 【Features (partial)】 ■ 64bit, 4GB PS DDR4 RAM (Upgradable) ■ 16bit, 2GB PL DDR4 RAM (Upgradable) *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

The "Agilex 3 SoC FPGA System on Module" is a product equipped with a dual-core Arm Cortex-A55 processor (up to 800MHz) and provides up to 135,110 logic elements. It features 4GB of HPS LPDDR4 memory (expandable up to 8GB), 32GB of eMMC storage (expandable up to 128GB), and 1Gb of QSPI flash (expandable up to 2Gb). Additionally, it offers four GTS transceivers (up to 12.5Gbps) and various interfaces (such as 2.5G Ethernet PHY, USB 2.0 OTG), and supports an operating temperature range of -40°C to +85°C. [Features (partial)] ■ AgilexTM 3 C-Series family with M16A Package ■ HPS LPDDR4 – 32bit 4GB (Expandable up to 8GB) *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

The "Achronix Speedster7T System on Module iW-RainboW-G64M" is a product optimized for AI/ML and wide bandwidth data acceleration applications, featuring the Achronix Speedster7t AC7t1500 FPGA. It is equipped with 16GB of GDDR6 memory and 8GB of DDR4 memory, providing 32 SerDes that operate at up to 106Gbps. Additionally, it integrates the i.MX 8X Lite OSM with dual Cortex-A35 and dual Cortex-M4F cores, offering a variety of interfaces such as Gigabit Ethernet and USB 2.0 OTG. [Features (partial)] ■ Achronix Speedster7t 1500t FPGA with F53 package ■ 8GB DDR4 with ECC (64bit + 8bit) ■ 14GB GDDR6 (7x 2GB Devices) *For more details, please download the PDF or feel free to contact us.

• Embedded Board Computers

The "AndesCore AX25" is a compact 64-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. It is optimized for high-performance embedded applications that require access to an address space exceeding 4GB. Options such as branch prediction for efficient branch instruction execution, instruction and data caches, local memory for low-latency access, and ECC for L1 memory soft error protection are available. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ DSP/SIMD ISA suitable for digital signal processing ■ Floating-point extension ■ Andes extensions that enable high performance and high functionality *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore A25" is a 32-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. It achieves high performance per MHz and operates at high frequencies with a low gate count. Additionally, the Andes Custom Extension (ACE) is offered as an option to add custom instructions that lead to performance improvements and optimization of performance/power. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ DSP/SIMD ISA suitable for digital signal processing ■ Floating-point extension ■ Andes extension features that enable high performance and high functionality *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore D25F" is a 32-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. For Linux-based applications, it supports the RISC-V P-extension (draft) DSP/SIMD ISA, which has been significantly contributed to by Andes Technology, as well as single-precision/double-precision floating-point instructions and an MMU. Additionally, options are available for branch prediction for efficient branch instruction execution, instruction and data caches, local memory for low-latency access, and ECC for L1 memory soft error protection. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ DSP/SIMD ISA suitable for digital signal processing ■ Floating-point extension ■ Andes extensions that enable high performance and high functionality *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore NX25F" is a compact 64-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. It is optimized for high-performance embedded applications that require access to an address space exceeding 4GB. Additionally, Andes Custom Extension (ACE) is offered as an option to add custom instructions that lead to performance improvements and optimization of performance/power. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ Floating-point extension ■ Andes extensions capable of achieving high performance and high functionality ■ Andes Custom Extension (ACE) available under separate licensing for customization and custom instructions *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N25F" is a 32-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. It achieves high performance per MHz and operates at high frequencies with a low gate count, supporting single-precision and double-precision floating-point instructions. Additionally, the Andes Custom Extension (ACE) is offered as an option to add custom instructions that lead to performance improvements and optimization of performance/power. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ Floating-point extension ■ Andes extensions capable of achieving high performance and high functionality ■ Andes Custom Extension (ACE) available for separate licensing for customization and custom instructions *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N22" is a 32-bit, dual-stage pipeline CPU IP core based on the AndeStar V5 architecture, designed for embedded applications that require low power consumption and small circuit size. It complies with RISC-V technology and features several efficient performance capabilities, including simple dynamic branch prediction, instruction cache, and local memory. Additionally, it comes with a rich set of optional features such as a JTAG debug interface for development support. 【Specifications (partial)】 ■ AndeStar V5/V5e Instruction Set Architecture (ISA) based on RISC-V technology ■ Supports RV32IMAC/EMAC ■ Andes extensions that enable high performance and high functionality ■ 32-bit, dual-stage pipeline CPU architecture ■ High code density with mixed 16/32-bit instruction formats *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore AX25MP" is a 64-bit multi-core CPU IP core based on the AndeStar V5 architecture. It features an MMU for Linux-based applications, branch prediction for efficient branch instruction execution, level-1 instruction and data caches, and local memory for low-latency access. Additionally, it supports up to 4 cores and a level-2 cache controller with instruction and data prefetch. 【Specifications (partial)】 ■ Symmetric multiprocessor with up to 4 cores ■ Supports level-2 cache and cache coherence ■ AndeStar V5 Instruction Set Architecture (ISA) Compliant with RISC-V ISA IMACFDN, including Andes performance/function extensions ■ Floating-point extension *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore A25MP" is a 32-bit multi-core CPU IP core based on the AndeStar V5 architecture. It features an MMU for Linux-based applications, branch prediction for efficient branch instruction execution, level-1 instruction and data caches, and local memory for low-latency access. Additionally, it supports up to four cores and a level-2 cache controller with instruction and data prefetch. 【Specifications (partial)】 ■ Symmetric multiprocessor with up to 4 cores ■ Supports level-2 cache and cache coherence ■ AndeStar V5 Instruction Set Architecture (ISA) Compliant with RISC-V ISA IMACFDN, including Andes performance/function extensions ■ Floating-point extension *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N15/N15F" is a dual-issue superscalar AndesCore processor. It offers a performance of 5.41 CoreMark/MHz and comes with various configuration options such as MMU, cache, and local memory. Additionally, the 64-bit data bus for cache, local memory, and main bus provides the bandwidth necessary for instruction fetch and data access. 【Specifications】 ■ Dual-issue pipeline ■ Cache for fast code and data access ■ Local memory for code and data access ■ Built-in IEEE754 compliant FPU coprocessor (N15F) ■ Memory Management Unit (MMU) for Linum ■ 64-bit AXI4/AHB/AHBx2 bus interface *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore D15/D15F" is a dual-issue superscalar AndesCore processor. Both processors are equipped with over 130 compiler-friendly general-purpose DSP and SIMD instructions to easily program DSP algorithms in C/C++. They are also designed for a variety of performance-driven applications in embedded Linux, real-time OS, or bare-metal environments. 【Specifications (partial)】 ■ Dual-issue pipeline ■ Over 130 DSP extension instructions ■ Cache for fast code and data access ■ Local memory for code and data access ■ Built-in IEEE754 compliant FPU coprocessor (D15F) *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N7" is an IP core that supports controllers requiring low power consumption, such as touch screens, storage, mobile devices, and sensors, as well as network connectivity needed for IoT devices. The ultra-low power consumption and small circuit size of the N7 are designed for SOC designs with performance constraints. FlashFetch technology can enhance the performance of latency-prone flash memory without additional power consumption. 【Specifications】 ■ Seamless transition from 8/16-bit MCUs to a complete 32-bit environment ■ Low power consumption to extend battery life ■ Small footprint with fewer gates and high code density ■ Speeding up Flash access and reducing power consumption with FlashFetch technology *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore D10" is a 5-stage pipeline integer processor equipped with a DSP that includes 130 DSP SIMD (Single Instruction, Multiple Data) instructions. Targeting the real-time processing requirements of multimedia applications with power constraints, the D1088 achieves 588 DMIPS using a 90nm low-power process. Additionally, for voice applications, the D1088 provides left shift, right rounding and shift, most significant word, 32x32 multiplication, and specially designed 32-bit instructions to replace long 64-bit calculations. 【Specifications】 ■ Over 130 DSP extended instructions ■ Cache for fast code and data access ■ Local memory for code and data access ■ Built-in IEEE754 compliant FPU coprocessor ■ Memory Protection Unit (MPU) for RTOS ■ Memory Management Unit (MMU) for Linum *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore S8" is an IP core based on the N8 core computing engine, with added features to address security against hacking. The secure memory protection unit (MPU: Memory Protection Unit) at the center strictly protects execution and access according to multiple security levels. Additionally, it includes defenses against hacking targeting the interface between the CPU and memory, as well as the capability to monitor the CPU's power usage signature to prevent program hacking. 【Specifications】 ■ Secure MPU against memory tampering ■ Shield against side-channel attacks ■ Secure debugging for multi-party software development ■ Flexible configuration and runtime control *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N8" is an IP core that provides a long-term roadmap for customers requiring an upgrade path from 8-bit cores. With the ability to process both 16-bit and 32-bit instructions, it enables a reduction in the ROM size of program data. While being a computing platform comparable to an 8-bit controller, it achieves the performance of an advanced 32-bit processor. 【Specifications】 ■ Excellent overall performance ■ Vector interrupts for low-latency interrupt handling ■ Small footprint with fewer gates and high code density ■ Faster Flash access and power reduction through FlashFetch technology *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N9" is an IP core designed for applications that require interrupt response capabilities, such as wireless networking, sensors, microcontrollers, and automotive electronics. The low-power N9 family processor has a small gate count, low interrupt latency, and low-cost debugging. The processor family provides excellent performance and outstanding interrupt handling response while addressing the challenges of low dynamic and static power constraints. 【Specifications】 ■ High-performance V3 ISA based on a compact CPU architecture ■ Excellent overall performance ■ Efficient pipeline optimized for local memory access ■ High configurability including AXI bus support *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N13" is a high-performance CPU core designed for compute-intensive applications running on operating systems or bare metal. It is designed to meet the stringent requirements of application processors for consumer electronics such as HDTVs, home media servers, and set-top boxes, as well as the SoCs for switches and routers that deliver content to these devices. Equipped with a memory management unit, L1/L2 cache, local memory, DMA, FPU, vector interrupts, and branch prediction, it can easily run complex operating systems like Linux. 【Specifications】 ■ Optimized pipeline for best performance at 1GHz or higher ■ Dynamic branch prediction accelerates loop execution ■ ULM (Unified Local Memory) for parallel access ■ 64-bit AXI bus for high bandwidth and low latency ■ MMU and MPU for Linux and RTOS ■ Supports FPU coprocessor and L2 cache *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore N10" is an IP core suitable for applications ranging from consumer media players and smart glasses to touch panels, motor control, and power management. It features a 5-stage pipeline and operates at clock frequencies exceeding 800MHz, providing sufficient performance for automotive electronics and industrial control. Additionally, it comes with I/D cache or local memory options, allowing the core to run more efficiently in network or communication applications. 【Specifications】 ■ Cache for high-speed code and data access ■ Local memory for code and data access ■ IEEE754 compliant FPU coprocessor ■ Memory Protection Unit (MPU) for secure RTOS ■ Memory Management Unit (MMU) for Linux *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "AndesCore E8" is a power-efficient and compact embedded controller enabled by the unique Andes Custom Extension (ACE). With its proprietary ACE environment, designers can specify architectural elements suitable for IoT applications. Using Andes' Custom-Optimized Instruction Development Tools (COPILOT), designers can create custom instructions that differentiate their products and designs from competing products based on standard instruction set processors. 【Specifications】 ■ Class-leading performance per MHz ■ Andes Custom Extension (ACE) significantly improves performance efficiency ■ Small footprint with fewer gates and high code density ■ Faster flash access and reduced power consumption through FlashFetch technology *For more details, please refer to the related links or feel free to contact us.

• ASIC

The "Alveo U200" is a data center accelerator card developed to quickly respond to the evolving requirements of data centers. It provides up to 90 times the performance of a CPU for common workloads such as machine learning inference, video transcoding, and database search/analysis. It flexibly accommodates evolving acceleration requirements and algorithm standards, allowing various workloads to be accelerated without changing the hardware, while also keeping total cost of ownership (TCO) low. 【Features (partial)】 ■A-U200-P64G-PQ-G ・INT8 TOPs (peak): 18.6 ・Height: Full ・Length: 3/4 ・Width: Dual slot *For more details, please refer to the related links or feel free to contact us.

• Other electronic parts

The "Alveo U250" is a data center accelerator card from Xilinx that provides up to 90 times the performance of a CPU for common workloads such as machine learning inference, video transcoding, and database search/analysis. Built on Xilinx's 16nm UltraScale+ architecture, it flexibly adapts to evolving acceleration requirements and algorithm standards, allowing various workloads to be accelerated without changing the hardware. It also helps to reduce total cost of ownership (TCO). 【Features (partial)】 ■A-U250-P64G-PQ-G ・INT8 TOPs (peak): 33.3 ・Height: Full ・Length: 3/4 ・Width: Dual slot *For more details, please refer to the related links or feel free to contact us.

• Other electronic parts

The "Alveo U280" is a data center accelerator card built on Xilinx's 16nm UltraScale+ architecture. It is equipped with 8GB of HBM2 memory and a bandwidth of 460GB/s, providing high performance and adaptability for memory-bound, compute-intensive applications such as databases, analytics, and machine learning inference. Additionally, it is not only suitable for mass production operations in data centers but also useful for application development and prototyping. 【Features (partial)】 ■ Passive - INT8 TOPs (peak): 24.5 - Width: Dual slot - Form factor: Full height, 3/4 length - Maximum total power consumption: 225W *For more details, please refer to the related links or feel free to contact us.

• Other electronic parts

The "Alveo U50" is a data center accelerator card that supports various workloads such as financial computing, machine learning, computational storage, and data search/analysis, providing optimized acceleration features. Built on Xilinx's UltraScale+ architecture, this product is packaged in a low-profile form factor with excellent power efficiency at 75 watts, integrating 100Gbps network I/O, PCIe Gen4, and HBM, and can be operated in various server configurations. Please feel free to contact us for inquiries. 【Features (partial)】 ■ Board Specifications ・U50 (Production) A-U50-P00G-PQ-G ・U50LV (Production) A-U50-P00G-LV-G ■ Lookup Table (LUT): 872K ■ Registers: 1,743K ■ DSP Slices: 5,952 *For more details, please refer to the related links or feel free to contact us.

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The "Alveo U25" is a SmartNIC platform for cloud engineers. It provides a comprehensive solution that integrates networking, storage, and compute acceleration functions into a single platform. Additionally, since it is built on advanced FPGA technology, it enables hardware acceleration and offloading while maximizing efficiency by eliminating unnecessary data movement and CPU processing. 【Features (partial)】 ■ Board specifications: Alveo U25 accelerator card ■ Lookup Table (LUT): 522K ■ Height: 2.54 inches (64.4mm) ■ Length: 6.60 inches (167.65mm) ■ Width: Single x16 PCIe slot *For more details, please refer to the related links or feel free to contact us.

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The "Alveo SN1000" is a SmartNIC that supports various offloads on a single platform and achieves software-defined hardware acceleration. It quickly offloads a variety of customized functions, including offloads built by users or third parties. With an architecture that achieves line rate, it directly offloads CPU-intensive tasks, optimizing network performance. 【Features (partial)】 ■ Board specifications: Alveo SN1000 SmartNIC accelerator card ■ PCI Express: PCIe Gen4×8 or Gen3×16 ■ Network interface: 2×100G QSFP28 copper or optical transceivers ■ Link speed: 100GbE ■ ARM processor: Discrete 16-core Cortex-A72 processor *For more details, please refer to the related links or feel free to contact us.

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"SmartSSD" is a computational storage built on Xilinx's adaptive platform. It is a customizable and reprogrammable computational storage platform that provides solutions for acceleration. It enables computation to be performed close to data storage, speeding up the operation of applications that involve large-scale data processing by more than 10 times. 【Features (partial)】 ■ Form factor: 2.5 inches (U.2) ■ Storage capacity: 3.84TB (other capacities are also planned for release) ■ Host interface: Single port PCIe Gen3×4 ■ Compliance: NVMe specification rev.1.3, PCIe-based specification rev.3.0, NVMe Management Interface (NVMe MI) 1.0 *For more details, please refer to the related links or feel free to contact us.

• Storage