[Webinar] Overview of RISC-V Verification Environment and Its Construction, as well as Trends of RISC-V Abroad.
Amidst the global semiconductor shortage, many companies are struggling with production plans due to difficulties in semiconductor procurement, leading to missed business opportunities and significant impacts on management. As a result, an increasing number of companies are reconsidering their own procurement strategies. In this context, "RISC-V" is gaining attention. It is an open standard instruction set architecture (ISA) that allows for the addition of custom extension instructions and has no licensing fees, which has heightened interest among various companies.
In this webinar, we will introduce an overview of the RISC-V verification environment and its configuration, featuring real examples from NSITEXE, a leader in the industry for proprietary processor IP development. Additionally, we will have an explanation of global trends surrounding RISC-V from Imperas, a leading company providing hardware design verification solutions for RISC-V.
This webinar is highly recommended for those who are already designing and developing semiconductors based on RISC-V, those who are planning to start design and development, as well as those who are still in the consideration stage. We encourage you to participate.

| Date and time | Thursday, Apr 13, 2023 02:00 PM ~ 03:00 PM |
|---|---|
| Entry fee | Free |
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