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  1. Home
  2. Chemical
  3. 奥野製薬工業 大阪・放出、東京、名古屋など
  4. We will be exhibiting at the Semiconductor and Sensor Packaging Exhibition / the Specialized Exhibition for Semiconductor Backend Processes (ISP).
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  • Jan 05, 2024
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Jan 05, 2024

We will be exhibiting at the Semiconductor and Sensor Packaging Exhibition / the Specialized Exhibition for Semiconductor Backend Processes (ISP).

奥野製薬工業 奥野製薬工業 大阪・放出、東京、名古屋など
Okuno Pharmaceutical Industry has developed new surface treatment chemicals and plating processes for semiconductors to respond to the evolution of semiconductors. The new products will be introduced at the 25th Semiconductor and Sensor Packaging Exhibition, which will be held at Tokyo Big Sight from January 24 (Wednesday) to January 26 (Friday), 2024. At the venue, we will present plating chemicals and processes for semiconductor wafers and package substrates, ultra-fine wiring, and the latest surface treatments for power devices, under the theme of OKUNO contributing to the development of printed circuit boards and semiconductor package substrates. We will also showcase the new "TORYZA" series for semiconductor back-end processes, including an electroless plating process for UBM formation on wafers and dedicated plating equipment, so please stop by. For more details, please check the related link [Exhibiting at the Semiconductor and Sensor Packaging Exhibition/Specialized Exhibition for Semiconductor Back-End Processes (ISP)].
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Exhibiting at the 25th Semiconductor and Sensor Packaging Exhibition / Specialized Exhibition for Semiconductor Backend Processes (ISP)
Our company will be exhibiting at the 25th Semiconductor and Sensor Packaging Exhibition, which will be held at Tokyo Big Sight from January 24 (Wednesday) to January 26 (Friday), 2024. We will showcase our new product series "TORYZA" for semiconductor backend processes, including an electroless plating process for UBM formation for wafers and dedicated plating equipment. We look forward to your visit.

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TORYZA LCN SP製品情報.png

Copper sulfate plating additive for semiconductor wafers - TORYZA LCN SP

TORYZA LCN SP, the optimal electroplating solution for forming copper pillars on semiconductor wafers and package substrates.

Solder balls have been widely used in semiconductor packaging. However, due to the increase in pin count (the number of terminals on the substrate), the increase in the number of chips being packaged, and the reduction in bonding area, solder bumps with a diameter of about 100µm are becoming insufficient for high-density packaging. As an alternative, attention is being drawn to a method that involves forming a redistribution layer (RDL) on the semiconductor and using copper pillars for bonding. Our company has developed the optimal additive for copper pillars, TORYZA LCN SP. TORYZA LCN SP can also be used to form ultra-fine electrodes on the build-up layer of the package substrate.

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TORYZA LCN SV製品情報.jpeg

Copper sulfate plating additive for semiconductor wafers - TORYZA LCN SV

Supports high aspect ratio filling, copper sulfate plating additive for silicon interposers - TORYZA LCN SV.

With the advancement of semiconductor performance and functionality, packaging technologies related to chiplets that implement multiple chips with different functions on a single substrate and three-dimensional integration are gaining attention. Among these, silicon interposers with wiring formed on silicon are attracting interest because they can miniaturize the length and width of the wiring, thereby enhancing the transmission capability of high-frequency signals. Our company has developed TORYZA LCN SV as an additive for silicon interposers that supports high aspect ratio filling. TORYZA LCN SV excels in embedability into TSVs, achieving void-free and low film thickness high aspect ratio filling.

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TORYZA LCN SD製品情報.jpeg

Copper sulfate plating additive for semiconductor wafers - TORYZA LCN SD

Copper sulfate plating additive for semiconductor wafers, high heat dissipation and high current applications - TORYZA LCN SD.

Smartphones are widely used not only for calls but also for content viewing such as music and videos, online shopping, and in industries like automobiles, smart home appliances, and robotics. Mobile communication devices like cell phones and tablets have undergone significant evolution approximately every 10 years, with their maximum communication speeds increasing by about 1,000,000 times over the past 30 years. Additionally, semiconductors used in servers and high-performance computers are required to achieve even higher performance and multifunctionality. Our company has recently developed a new copper sulfate plating additive, TORYZA LCN SD, which is optimal for low aspect ratio via filling. TORYZA LCN SD can be widely applied to microbumps that join semiconductor chips and build-up wiring boards, as well as thermal vias used for heat dissipation in trench wiring on wafers and power semiconductors.

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TORYZA LCN FRV製品情報.jpeg

Copper sulfate plating additive for semiconductor wafers - TORYZA LCN FRV

FOWLP, FOPLP, and next-generation semiconductor package substrates, as well as ultra-fine wiring copper sulfate plating additives - TORYZA LCN FRV.

In recent years, semiconductor packaging technology has gained attention with FOWLP and FOPLP, which allow for an increase in the number of terminals relative to chip area by forming a redistribution layer on the wafer and expanding the terminals to the outside of the chip (Fan Out), in contrast to the conventional FC-BGA that is disadvantageous for thinness and cost reduction. Our company has developed a new copper sulfate plating additive for the formation of the redistribution layer in FOWLP and FOPLP. This product excels in film thickness uniformity and rectangularity of pattern shape, and it also accommodates filling of small-diameter vias. Additionally, to support the increase in the number of terminals on the chip side, the formation of ultra-fine wiring layers on the build-up layer of conventional FC-BGA is also being considered. This product is optimal for the formation of ultra-fine wiring in next-generation semiconductor package substrates.

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ubm_image.JPG

UBM formation plating process for aluminum electrodes on a wafer.

It is the process of forming UBM. It can improve the connection reliability between the aluminum electrode and the package terminal.

UBM stands for Under Bump Metal or Under Barrier Metal, and it is a film formed to join aluminum electrode pads on semiconductor chips with package terminals through wire bonding, soldering, or silver sintering. This film is composed of materials such as electroless nickel/gold plating or electroless nickel/palladium/gold plating. We offer a wide range of products that support the evolution of semiconductors and electronics, so please feel free to consult with us.

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Related catalog(5)

UBM formation plating process and dedicated equipment for aluminum electrodes on wafers.

UBM formation plating process and dedicated equipment for aluminum electrodes on wafers.

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TORYZA LCN SP, a plating additive suitable for forming copper pillars on semiconductor wafers and package substrates.

TORYZA LCN SP, a plating additive suitable for forming copper pillars on semiconductor wafers and package substrates.

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FOWLP, FOPLP, and copper sulfate plating additives for ultra-fine wiring such as semiconductor package substrates - TORYZA LCN FRV.

FOWLP, FOPLP, and copper sulfate plating additives for ultra-fine wiring such as semiconductor package substrates - TORYZA LCN FRV.

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Copper sulfate plating additive for semiconductor wafers, high heat dissipation and high current applications - TORYZA LCN SD.

Copper sulfate plating additive for semiconductor wafers, high heat dissipation and high current applications - TORYZA LCN SD.

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Copper sulfate plating additive for semiconductor wafers - TORYZA LCN SV

Copper sulfate plating additive for semiconductor wafers - TORYZA LCN SV

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奥野製薬工業
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AAEON Mini-ITX Standard Industrial Motherboard with Intel Core Ultra5 125H, DC12V Input [MIX-MTLD1]

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Features ● Equipped with Intel Core Ultra 5 125H ● Dual Channel DDR5 5600MHz × 2 slots (up to 96GB) (sold separately) ● HDMI 2.0 × 4 ● M.2 3042/3052 B-Key × 1, 2230 E-Key × 1, 2280 M-Key × 1 (PCIe Gen4 [x4], NVMe) (sold separately) ● USB 2.0 × 5, USB 3.2 × 3, USB 3.2 Gen 1 (Type-C) × 1 ● LAN × 2 ● 12V DC input power ● OOB (Out-of-Band Management) module compatible: MOD-RMB (via i210-AT) * This model does not include memory, storage, or OS.

Oct 16, 2025

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AAEON Mini-ITX Standard Industrial Motherboard Compatible with Intel Core Ultra 200S Series [MIX-H810WV1]

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Features ● Compatible with Intel Core Ultra 200S series ● DDR5 SODIMM x 2 (up to 96GB) ● PCIe x4 x 1, M.2 3042/52 B-key x 1 ● USB2.0 x 4, USB3.2 Gen2 x 2 (rear I/O), USB3.2 Gen1 x 1, USB2.0 x 1 (pin header) ● SATA 6Gb/s x 2 ● HDMI 2.0 x 2, DP 1.4 x 1 ● DC input 19V ~ 24V * This model does not include memory, storage, or OS.

Oct 16, 2025

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AAEON Mini-ITX Standard Industrial Motherboard with Intel N97【MIX-ASLD1】

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Features ● Equipped with Intel Processor N97 ● DDR5 SODIMM up to 16GB (sold separately) ● M.2 2280 M-Key x 1 (Auto Detect, PCIe [x1] & SATA Mode), M.2 2230 E-Key x 1, M.2 3042/52 B-Key x 1 ● USB3.2 x 1 (rear I/O), USB2.0 x 4 (pin header) ● PoE x 1, GbE LAN x 1 ● 12V DC input ● OOB onboard * This model does not include memory, storage, or OS.

Oct 16, 2025

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PFAS Regulation Countermeasures! ■■ Leak Test Equipment for Small Electronic Components|MSA-0101 series ■■ Does not use fluorinated inert fluids. PFAS-free. Offers accuracy equal to or better than liquid immersion testing.

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● This is a leak testing device for small electronic components that does not use fluorinated inert liquids (PFAS-free). ● There is no longer a need for unstable visual confirmation through liquid immersion testing. It adopts a quantitative testing method that allows for stable pressure leak testing. ● It is a tabletop leak testing device specifically for gross leaks, with accuracy equal to or greater than that of liquid immersion testing. ● The detectable range is approximately 1×10⁻² Pa·m³/s to 1×10⁻⁶ Pa·m³/s (varies depending on the target product). ● It is suitable for sealed structures ranging from a few millimeters to a maximum of 80 × 70 mm. Please feel free to contact us for more information!

Oct 16, 2025

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【Metal Crack Repair】We repair cracks in metal products without applying heat.

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The "Mechanical Stitch Method" by Nichinichisui Road Machinery Co., Ltd. is a new technique that allows for the repair of metal cracks without the application of heat. By using special bolts and reinforcement plates, cracks are physically removed, and repairs are made without causing any thermal impact to the base material. Repairs can be carried out in environments where open flames cannot be used. Since no heat is applied, the disassembly of equipment is minimized. ◎ For more details, please contact us. ◎ If a detailed technical explanation is needed, please contact us.

Oct 16, 2025

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