Silicon interposer
Silicon interposer (through holes penetrating the pad area of JTEG Phase 0)
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basic information
The JTEG and JKIT from Hitachi Ultra LSI Systems, which we are introducing here, ceased production of all products as of December 2009. The latest information on Well's original open TEG chip "JCHIP" can be found here: http://well-teg.jp/
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Applications/Examples of results
■Main Applications Development of flip chip packages for high-speed and high-frequency devices / Development of silicon through-via formation technology (equipment and materials development) / Development of 3D mounting methods Our test chips are standard TEG chips developed to accommodate various methods for SIP development, package development, mounting method development, PCB substrate development, mounting and inspection equipment development, and materials development, and are already used by over 200 customers both domestically and internationally. We also accept orders for custom chips with special specifications. 【Contact Information】 Phone: 03-5715-3501 E-Mail: info@welljp.co.jp Company Information http://www.welljp.co.jp/
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Well develops and implements a packaging solution business centered on test chips for advanced implementation evaluation, covering everything from bare chip packaging equipment development and contract implementation to reliability evaluation. ~ Corporate Philosophy ~ ■ With "Profitable Relationship" as the core of our management philosophy, we aim to be a company that contributes to the prosperity of our customers and the development of the globally expanding electronics components industry. ■ Through the provision of products that support next-generation semiconductor packaging development, we contribute to the promotion of our customers' development and the enhancement of their profits. ■ We aim to create valuable markets by providing "innovative products" and "cutting-edge services."