High-frequency toroidal core [T12-12]
"Iron powder (ferrous powder) core" [T12-12]
This is the "T12-12" iron powder core manufactured by MICROMETALS, which has a protective coating.
- Company:東京光電子
- Price:Other
Last Updated: Aggregation Period:Sep 17, 2025~Oct 14, 2025
This ranking is based on the number of page views on our site.
Last Updated: Aggregation Period:Sep 17, 2025~Oct 14, 2025
This ranking is based on the number of page views on our site.
Last Updated: Aggregation Period:Sep 17, 2025~Oct 14, 2025
This ranking is based on the number of page views on our site.
226~240 item / All 264 items
"Iron powder (ferrous powder) core" [T12-12]
This is the "T12-12" iron powder core manufactured by MICROMETALS, which has a protective coating.
"Iron powder (ferrous powder) core"【T18-6】
This is the iron powder core "T14-6" manufactured by MICROMETALS, which has a protective coating.
"Iron powder (ferrous powder) core" [T20-1]
This is an iron powder core 【T20-1】 manufactured by MICROMETALS, which has a protective coating.
It also includes modes for low power consumption and power management, as well as a debugging interface!
The "AndesCore A25" is a 32-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. It achieves high performance per MHz and operates at high frequencies with a low gate count. Additionally, the Andes Custom Extension (ACE) is offered as an option to add custom instructions that lead to performance improvements and optimization of performance/power. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ DSP/SIMD ISA suitable for digital signal processing ■ Floating-point extension ■ Andes extension features that enable high performance and high functionality *For more details, please refer to the related links or feel free to contact us.
A flexibly configurable platform to support a wide range of system event scenarios!
The "AndesCore D25F" is a 32-bit CPU IP core based on the AndeStar V5 architecture, which incorporates RISC-V technology. For Linux-based applications, it supports the RISC-V P-extension (draft) DSP/SIMD ISA, which has been significantly contributed to by Andes Technology, as well as single-precision/double-precision floating-point instructions and an MMU. Additionally, options are available for branch prediction for efficient branch instruction execution, instruction and data caches, local memory for low-latency access, and ECC for L1 memory soft error protection. 【Specifications (partial)】 ■ AndeStar V5 Instruction Set Architecture (ISA) utilizing RISC-V technology ■ DSP/SIMD ISA suitable for digital signal processing ■ Floating-point extension ■ Andes extensions that enable high performance and high functionality *For more details, please refer to the related links or feel free to contact us.
Symmetric multi-processor with up to 4 cores! Supports level-2 cache and cache coherence.
The "AndesCore A25MP" is a 32-bit multi-core CPU IP core based on the AndeStar V5 architecture. It features an MMU for Linux-based applications, branch prediction for efficient branch instruction execution, level-1 instruction and data caches, and local memory for low-latency access. Additionally, it supports up to four cores and a level-2 cache controller with instruction and data prefetch. 【Specifications (partial)】 ■ Symmetric multiprocessor with up to 4 cores ■ Supports level-2 cache and cache coherence ■ AndeStar V5 Instruction Set Architecture (ISA) Compliant with RISC-V ISA IMACFDN, including Andes performance/function extensions ■ Floating-point extension *For more details, please refer to the related links or feel free to contact us.
Designers can set specific parameters to adjust the size, power consumption, and performance of the CPU!
The "AndesCore N9" is an IP core designed for applications that require interrupt response capabilities, such as wireless networking, sensors, microcontrollers, and automotive electronics. The low-power N9 family processor has a small gate count, low interrupt latency, and low-cost debugging. The processor family provides excellent performance and outstanding interrupt handling response while addressing the challenges of low dynamic and static power constraints. 【Specifications】 ■ High-performance V3 ISA based on a compact CPU architecture ■ Excellent overall performance ■ Efficient pipeline optimized for local memory access ■ High configurability including AXI bus support *For more details, please refer to the related links or feel free to contact us.
With an 8-stage pipeline and a clock frequency exceeding 1GHz, the core delivers excellent performance of 2.05 DMIPS/MHz!
The "AndesCore N13" is a high-performance CPU core designed for compute-intensive applications running on operating systems or bare metal. It is designed to meet the stringent requirements of application processors for consumer electronics such as HDTVs, home media servers, and set-top boxes, as well as the SoCs for switches and routers that deliver content to these devices. Equipped with a memory management unit, L1/L2 cache, local memory, DMA, FPU, vector interrupts, and branch prediction, it can easily run complex operating systems like Linux. 【Specifications】 ■ Optimized pipeline for best performance at 1GHz or higher ■ Dynamic branch prediction accelerates loop execution ■ ULM (Unified Local Memory) for parallel access ■ 64-bit AXI bus for high bandwidth and low latency ■ MMU and MPU for Linux and RTOS ■ Supports FPU coprocessor and L2 cache *For more details, please refer to the related links or feel free to contact us.
You can bridge the internet connection of ZigBee, Bluetooth, or WiFi sensor devices!
The "AndesCore N10" is an IP core suitable for applications ranging from consumer media players and smart glasses to touch panels, motor control, and power management. It features a 5-stage pipeline and operates at clock frequencies exceeding 800MHz, providing sufficient performance for automotive electronics and industrial control. Additionally, it comes with I/D cache or local memory options, allowing the core to run more efficiently in network or communication applications. 【Specifications】 ■ Cache for high-speed code and data access ■ Local memory for code and data access ■ IEEE754 compliant FPU coprocessor ■ Memory Protection Unit (MPU) for secure RTOS ■ Memory Management Unit (MMU) for Linux *For more details, please refer to the related links or feel free to contact us.
FlashFetch improves performance while saving power!
The "AndesCore E8" is a power-efficient and compact embedded controller enabled by the unique Andes Custom Extension (ACE). With its proprietary ACE environment, designers can specify architectural elements suitable for IoT applications. Using Andes' Custom-Optimized Instruction Development Tools (COPILOT), designers can create custom instructions that differentiate their products and designs from competing products based on standard instruction set processors. 【Specifications】 ■ Class-leading performance per MHz ■ Andes Custom Extension (ACE) significantly improves performance efficiency ■ Small footprint with fewer gates and high code density ■ Faster flash access and reduced power consumption through FlashFetch technology *For more details, please refer to the related links or feel free to contact us.
Supports SAS 3.0Gbps, 6.0Gbps, and 12.0Gbps! Equipped with automatic credit control function.
The "IP Core SAS Target for FPGA and ASIC" complies with the SAS 3.0 standard and supports a maximum transfer rate of 12Gbps (1200MB/s) for Serial-SCSI (SAS) target (device). It consists of four blocks (Phy layer, LINK layer, PORT layer, TRN layer) and interfaces with processors, SerDes, and memory. It is designed to connect to SAS-compliant host applications to transmit and receive OOB signals, primitives, and SAS frames. 【Specifications (Excerpt)】 ■ Compliant with SAS 3.0 standard ■ Supports SAS 3.0Gbps, 6.0Gbps, and 12.0Gbps ■ Register access to link layer/transport layer ■ Supports SerDes, PIPE, and SAPIS interfaces ■ Supports OOB sequence and speed negotiation sequence *For more details, please download the PDF or feel free to contact us.
Secure applications can be assigned unique roots and keys, allowing for the establishment of independent permissions and access levels!
This product is a fully programmable hardware security core compliant with FIPS 140-3, designed from the ground up to provide quantum-resistant security for data centers and other applications requiring advanced security. Device and system architects are facing increasingly diverse security threats, including the risks posed by quantum computers. The need for hardware-based Root of Trust security implementations remains constant across various applications. This product offers extensive protection against both hardware and software attacks through advanced side-channel attack countermeasures, tamper resistance technologies, and security techniques. 【Features】 ■ Supports various security certifications up to Level 3 ■ Provides a future-proof hardware security solution ■ Enables the development of secure and reliable applications ■ Allows for the configuration of independent authorities and access levels *For more details, please refer to the related links or feel free to contact us.
Introducing the electromagnetic iron core (EI core) with a product width of 133.2mm! We also support mold design and manufacturing, with in-house integrated production. This is a high-quality product made using only Japanese materials.
The 'SA-4L' that we handle is an EI core with a product width of 133.2mm. All materials used are domestically sourced! We promise high-quality products as cores for transformers and voltage converters. 【Available Materials】 - G/0.35A (with 35Z155A) - S-14/0.35 (35H360) - S-14/0.5 (50H400) - SS/0.5A (with 50H600A) *Please inquire about stock availability. We also handle various sizes of EI cores and strip cores. Please feel free to contact us when you need assistance. 【Highlights】 ■ We also support mold design and manufacturing, ensuring in-house integrated production. ■ Using Japanese-made materials (Nippon Steel materials, JFE Steel materials). ■ Annealing treatment is also handled by us. *For more details, please refer to the PDF materials or feel free to contact us.
FireLink is a link layer controller IP core compliant with IEEE-1394b.
FireLink, a synthesizable IEEE-1394-2008 beta link layer controller (LLC) core, is based on the link layer controller that has been used in DapTechnology's FireSpy analyzer products for several years. FireLink is a mature core implemented on FPGAs from Xilinx, Altera, and Microsemi. FireLink is available in three configurations: Basic, Extended, and GPLink. ■Japanese technical documentation for AS5643 is available. If you would like to see it, please contact sales@nacelle.co.jp■