The high-speed computation execution unit demonstrates the best performance of FPGA IP!
We implemented a floating-point FIR calculation circuit on an FPGA and accelerated the algorithm from existing C source code. This unit has been adopted as an IP in customer-designed FPGAs. 【Features】 ● Equipped with a floating-point arithmetic unit compliant with IEEE 754 32-bit ● Has a specially customized pipeline structure that allows for high-speed execution of conventional C language expressions ● Optimized the structure to operate with small capacity and low-speed CLK while ensuring completion within the specified time
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Since our establishment in 1984, we have contributed to the information society by leveraging electronics technology, computer technology, and their combined technologies. To meet our customers' expectations, we continuously improve our quality management system and strive daily to acquire new technologies as a "research and development-oriented company," developing products and systems with higher added value. Additionally, we are committed to utilizing human resources with a global perspective and focusing on nurturing individuals with rich imagination and a spirit of adventure. As we enter the 21st century, the core of the multimedia society we aim for is the limitless imagination of people. Computers that weave together and shape human thoughts are themselves "crystals of knowledge," intricately designed and developed to surpass human imagination. NDR will continue to possess the energy to organically transform and respond to the demands of the times by enhancing our technological and informational capabilities.
