We provide an interface IP for FPGA (compatible with SLVS-EC Receiver Ver3.0).
This IP extracts and outputs Frame Start, Frame End, Embedded Data, and Pixel Data from the internal signals of the FPGA after receiving the SLVS-EC signal with the FPGA's Gigabit Transceiver. Additionally, by specifying the maximum number of lanes and the data bus width of the Gigabit Transceiver as parameters, it is possible to optimize resource consumption.
Inquire About This Product
basic information
○ IP for FPGA 【Product Name】 SLVS-EC v3.0 RX IP 【Model Number】 ITL-SLVSEC-v3-RX-PRD *For details, please refer to the PDF data available for download.
Price information
Please feel free to contact us.
Delivery Time
※Please feel free to contact us.
Applications/Examples of results
Image sensor evaluation device
catalog（1）
Download All Catalogs
Company information
● Image Giken assists customers with their development. We provide extensive support for customer development across hardware, FPGA, firmware, and software. If you provide us with a product concept, we can deliver a working prototype. For small lots, mass production supply is also possible. ● Image Giken is an expert in images. Through the development of various cameras and image sensor application devices, we have accumulated know-how in image signal processing. We have also quickly tackled and realized advanced interfaces such as USB 3.0, 3G-SDI (3D format compatible), MIPI (CSI-2 / DSI), and SLVS-EC Ver2.0. By using hardware processing with FPGA, we achieve high-speed processing and real-time processing. We implement real-time noise reduction processing for a 1.3 million pixel 2000fps CMOS image sensor. Additionally, we provide functions such as labeling engines as FPGA IP.
