コネクテックジャパン Product Lineup

How to integrate heat-sensitive image sensors with high-speed processing LSI. We solved this challenge with our unique 3D stacking technology. By 3D stacking heat-sensitive X-ray image sensors and TSV-forming LSI at low temperatures, we achieved direct bonding of the sensor pixel signal terminals. By arranging 144 sensors, each measuring 10mm on a side, with a minimal gap of 50µm, we enable large-area and high-sensitivity sensing. This is a case that condenses our know-how in utilizing silicon interposers to maximize high-speed measurement processing. *For specific processes of advanced 3D stacking technology, please refer to the materials.

The realization of high-sensitivity sensors requires extremely precise wafer processing technology to expand the light-receiving area. We conducted a special processing to form 1 million square holes with a 100µm pitch on a Φ200mm photodiode wafer. By maintaining square holes of 90µm and a thin wall structure of 10µm, we achieved an overwhelming large aperture ratio and successfully enhanced sensitivity. This is a fine processing solution unique to Connectec Japan, utilizing deep dry etching (DRIE) on silicon wafers. *The accuracy of wafer processing and detailed specifications are available in the downloadable materials.

We directly bonded memory chips and SOCs (COC) and responded to the advanced requirements of flip chip mounting onto package substrates. By coordinating the networks of four companies and ten processes, we successfully achieved bonding between heterogeneous chips of varying heights. Utilizing 40µm pitch copper pillar bonding and 90µm copper balls as spacers, we realized the shortest connections between chips and substrates. This structure, which maximizes signal transmission efficiency, provides a significant advantage in high-speed processing devices. *Details of the network that successfully integrates heterogeneous chips are illustrated in the accompanying materials.*

We have developed a three-layer coplanar RDL substrate using low-loss insulating materials and simultaneously achieved high-precision bonding of millimeter-wave chips. We overcame technical challenges such as wrinkles and warping due to thermal expansion, as well as deposits during via processing, through thorough process improvements. By utilizing landless vias and three-layer impedance matching RDL, we ensured transmission characteristics over a wide bandwidth of 70 GHz. This is a top-tier example of realizing customer desires by managing 24 complex processes through the amoeba-like collaboration of 15 partner companies. *For detailed information on the millimeter-wave compatible implementation process and verification results, please refer to the downloadable materials.*

In the early stages of development, a necessary "few to several dozen" prototypes. It is difficult for large companies to respond to this need, which is where our value lies. In large-scale companies like major foundries and OSATs that require significant investment recovery, mismatches in supply and demand for small-scale development projects tend to occur. "CADN" has established a decentralized production division model with small investments by organically connecting domestic legacy lines and research institutions. While hedging against regional risks such as earthquakes and floods, we have set up a system that can flexibly respond to a wide variety of structural and construction method requests. *For more details on the new business model "CADN," which consolidates Japan's manufacturing capabilities, please download here.