April 24th Event: MATLAB JMAG Integrated MBD Solution Seminar - Achieving Front-Loading with Domestic Manufacturer's Toolchain -

We significantly lowered the cost barrier for MATLAB-compatible RCP that can be tested with research budgets.

The "DT-0009 RTSim-IV" is a simulator that allows real-time execution of control models created in MATLAB/Simulink. It achieves a simulation cycle of 20μs without using an FPGA and can independently control a total of 12 channels of PWM. It offers an overwhelmingly low price as a MATLAB-based RCP. Additionally, the carrier wave of the PWM generator can be a triangular wave or a sawtooth wave. The carrier frequency can be changed during simulation and can be set for each PWM output. 【Specifications (excerpt)】 ■CPU: ARM Cortex-A9 800MHz dual-core processor ■Memory: 1GB DDR3 SDRAM ■A/D: 100ksps 12bit 4ch (0-4.096[V]) ■D/IO: Input: 16bit, Output: 16bit ■PWM: 12ch (3-phase upper and lower arms x2), maximum carrier frequency 1MHz *For more details, please refer to the PDF document or feel free to contact us.

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Standard equipped with a rental-compatible JMAG-RT compatible inverter failure simulation function! High precision and high-speed response capable motor HILS.

The DT-1063 motor signal generator is a motor HILS that allows for safe evaluation of controllers without the need for actual motors. It is a real-time simulator (motor HILS) compatible with the electromagnetic field analysis software JMAG developed and sold by JSOL Corporation. By loading JMAG-RT as the simulation model, it operates as a virtual inverter and motor. The compact box contains all the necessary systems for motor simulation and operates as a virtual motor with just a power supply. Additionally, it can be offered at about one-tenth the price of conventional products, making it possible to implement low-cost solutions for development departments aimed at mass production, such as outsourcing to external development partners. 【Features】 - Standalone independent system - Reasonable pricing - High-speed simulation - No advanced modeling technology required *For more details, please download the PDF or feel free to contact us.

• Signal Generator

"Front-loading" realized with the high-speed circuit simulator Scideam, equipped with a SiC/GaN device model, enabling loss analysis.

We would like to introduce Scideam, a domestic high-speed circuit simulator equipped with a SiC/GaN device model. It provides a comfortable simulation environment through over 25 years of historical computational algorithms and newly developed circuit editors and waveform viewers. By utilizing it in the early stages of development, you can preemptively eliminate factors such as specification failures and defects, thereby reducing design time and costs. This enables the realization of what is known as "front-loading."

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Verification of whether failure detection during inverter malfunction can be performed within the detection time (within 100 ms).

This document verifies whether a failure can be detected within 100 ms of the occurrence of an open fault in the U-phase upper arm. Failure detection is determined by extracting components of fourth order or higher from the current waveform using a high-pass filter. 【Contents】 ■ System Configuration ■ Controller Specifications ■ Motor Specifications ■ Verification Details ■ Verification Results ■ Discussion *For more details, please download the PDF or feel free to contact us.

• Contract Inspection

MATLAB/Simulink compatible high-speed motor support rapid prototyping controller

This is a rapid prototype controller that can execute models created in MATLAB/Simulink in real-time. It achieves a simulation cycle on the order of microseconds using dedicated hardware with an ARM core and FPGA. It is an ideal product for prototyping motor control controllers that require high-speed control calculations. The hardware utilizes a high-speed FPGA and multi-core CPU, featuring: - Minimal response time - High-speed, low-latency I/O with external peripherals - Large-capacity memory available for user use - Fundamental review of simulation management applications - Significant improvement in computation speed while maintaining calculation accuracy - Dramatic improvement in reproducibility - Improvement in reproducibility through the subdivision of calculation steps - Capability to implement solvers that require particularly fast calculations on the internal FPGA*1 System specifications: - Implementation method: Simulink Coder - Minimum step time: 1 [μsec] - Vector control current loop for PMSM*2: 0.6 [μsec] - Memory freely available for user use: 512 [MB]

• Other electronic measuring instruments

30 years of supported computational power - High-speed circuit simulator for power electronics, Scideam.

Scideam is a domestic high-speed circuit simulator specialized in power generation development and power electronics development. It provides a comfortable simulation environment with over 30 years of historical computational algorithms and newly developed circuit editors and waveform viewers. ◆ Three features of Scideam 1. High-speed stable analysis By utilizing a unique analysis algorithm, it resolves both analysis time and convergence issues. It is capable of high-speed stable analysis of switching converters. 2. Loss analysis It can perform loss analysis automatically and at high speed. It displays losses for all components in a list, and switching losses are also measured automatically. 3. Model-based development It connects with MATLAB Simulink and JMAG to build a model-based development environment. *For new download PCs, you can try the full package, including the Scideam product version and the loss analysis option PowerPalette, for 30 days.

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[Speaker] Ministry of Land, Infrastructure, Transport and Tourism, Road Bureau, Planning Division, Road Economic Research Office Planning Specialist Yuki Endo [Key Lecture Content] The Ministry of Land, Infrastructure, Transport and Tourism is advancing discussions on the realization of automated logistics roads as a new form of logistics in response to recommendations from the "Interim Summary on the State of High-Standard Road Networks," addressing logistics crises and carbon neutrality. This lecture will introduce the final summary on the state of automated logistics roads published in July of the 7th year of Reiwa, as well as the demonstration experiments planned for the 7th year of Reiwa. [Lecture Items] 1. Final summary on automated logistics roads 2. Demonstration experiments for the 7th year of Reiwa 3. Q&A / Business card exchange

[Speaker] NTT Docomo Business Inc. 5G & IoT Services Department Director in charge of Global Connected Cars, Yuji Tamai [Key Lecture Content] The value of SDV lies in continuously cycling 'updates × data × cloud', and connectivity is a prerequisite for this. In this presentation, we will organize the barriers of quality, cost, and regulation faced in global expansion, and explain the design principles and operational models from roaming enhancement, eSIM/RSP (SGP.32), integrated management (CMP), NTN, to Network API. Additionally, we will delve into security aspects related to connectivity, introducing phenomena observed in actual service operations and their countermeasures, as well as exploring other operational updates (staged delivery, avoiding simultaneous activation, monitoring/observability). [Lecture Items] 1. Positioning of connectivity in SDV 2. Barriers to global connectivity 3. Designing to "strengthen" roaming 4. eSIM/RSP and SGP.32 5. Integrated connectivity management (CMP) and operations 6. Further connectivity - NTN and Network API 7. Security and update operations 8. Q&A

"Even though I'm communicating, nothing changes." "When I give a warning, the atmosphere gets worse." — Are you trying to solve these problems just by changing how you interact? What you need is not to move people, but to create a workplace that is easy to navigate. I will explain based on numerous examples of on-site improvements that I have supported. Held on May 27 (Wednesday). Please check the LP for more details. ▼ For more information and registration (free), see below.

At the Dry Fog Humidification System Free Demo Experience, you will have the opportunity to actually experience our Dry Fog, as well as our single-fluid and dual-fluid humidifiers. We will explain the differences from conventional humidifiers and the effects of implementation. In addition to introducing the latest case studies, we will also provide time for you to consult directly with our specialized staff. Please select a convenient venue and date from the application page and apply. * The "morning session" and "afternoon session" contain the same content. Please participate at a time that suits you. * This event is intended for users only. Participation from trading companies, other companies in the same industry, or for sales purposes to our company is not permitted. Venues: ■ Yamagata Venue: 3/12 (Wed) at Yamagata International Exchange Plaza 3/13 (Thu) at Sakata Chamber of Commerce and Industry ■ Sendai Venue: 3/14 (Fri) at Kiri no Ikeuchi Sendai Branch ■ Tokyo Venue & Osaka Venue: 3/18 (Tue), 3/19 (Wed), 3/21 (Fri) at Kiri no Ikeuchi Tokyo Sales Office & Kiri no Ikeuchi Osaka Headquarters ■ Nagoya Venue & Fukuoka Venue: 4/9 (Wed), 4/10 (Thu), 4/11 (Fri) at Kiri no Ikeuchi Nagoya Sales Office & Kiri no Ikeuchi Fukuoka Sales Office

In recent years, as many companies are considering modernization, exploring methods for system renewal has become an important issue. This seminar will focus on "Rewrite," one of the solutions to such challenges, and will explain questions and issues encountered during project promotion in a Q&A format. <Program> - Opening - How to advance system renewal through "Rewrite" and key points for problem-solving - Introduction of unique tools to support migration <Recommended for> - Those who are struggling with specific methods for system renewal - Those who are concerned about the continuity of maintenance for existing systems and a shortage of personnel - Companies that own IBM i (AS/400) *We may refuse applications from competing companies or those not eligible to participate.