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  6. Design support tool "Strategy Time Chart Standard"

Design support tool "Strategy Time Chart Standard"

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last updated:Jul 08, 2019

ストラテジー
ストラテジー
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We will support your design with a drawing tool that creates timing charts.

"StrategyTimeChartSTD" is a design support tool that thoroughly pursues ease of use. Basic operations, such as waveform drawing, can be easily performed with a mouse. It smartly and comprehensively supports the functions that developers working in the field need, such as automatic waveform generation and timing violation detection. It also supports files from various design tools and measurement devices, allowing for immediate integration into existing design, analysis, and review workflows. 【Features】 - Easily draw beautiful timing charts - Automatically generate waveforms for clocks, buses, and counters - Automatically generate waveforms from logical expressions, truth tables, and pattern notations - Capable of drawing sine waves, capacitor charge/discharge waveforms, and digital four-value representations - A variety of editing functions For more details, please contact us or download the catalog.

    Development support tools (ICE, emulators, debuggers, etc.)
Time.png

Design support tool "Strategy Time Chart Standard"

Time.png
Time.png
  • Related Link - http://www.k-s-g.co.jp/product/timechart/

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basic information

**Features** [Drawing] ○ Easily draw waveforms using only the mouse for most operations ○ Automatic generation of clock waveforms ○ Automatic generation of waveforms for single signals, buses (2-64 bit width), and counters ○ Automatic generation of waveforms from logical expressions, truth tables, and pattern notations ○ Capability to represent sine waves, capacitor charge/discharge waveforms, and digital 4-value representations [Editing] ○ Various editing functions such as copying and pasting waveforms ○ Representation of arrows for time width and triggers, various shapes, and comments ○ Redrawable from the time cursor ○ Customizable text ○ Full OLE server support [Timing Violation Detection Function] ○ Centralized management of timing specification points [File Format Conversion] ○ Import files in other formats → TDML, TCML, WLF, VCD, text, binary, IntelHEX, state log files from measuring instruments ○ Convert formats for use with other tools → Text files for HDL test benches, Wait statements, binary, EPS, ROM data such as IntelHEX, pattern files for CX1000 ● For more details, please contact us or download the catalog.

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Regular price: 9,000 yen (excluding tax). Discounts are available depending on the quantity, so please feel free to contact us.

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Design support tool "Strategy Time Chart Standard"

Design support tool "Strategy Time Chart Standard"

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ストラテジー

ストラテジー

Industrial Electrical Equipment

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Our company is an independent firm located in Tokorozawa City, Saitama Prefecture, engaged in the development, design, and technical support of equipment and devices related to the environment, health care, communication devices, information processing, signal processing, and production lines. Each employee is encouraged to take initiative and carry out their duties responsibly. Like advanced companies in Silicon Valley, we strive to avoid fixed ideas, utilize free thinking, and maintain an open mind and skepticism at all times.

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