Adopting highly reliable AES encryption technology to protect IP assets from illegal copying.
IPLock is an FPGA logic security system that employs highly reliable AES encryption technology. By integrating the IP Lock logic into user logic and mounting a security chip in SOIC-8 size onto the user board, it protects the IP assets within the FPGA from illegal duplication.
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basic information
【Easily Achieve IP Core Protection!】 Step 1: Add the IPLock pattern during the circuit design of the board. Step 2: Want to apply security against unauthorized copying to your FPGA design data? → Purchase IPLock. Step 3: Add IPLock logic to the FPGA design data and compile it with FPGA tools. Step 4: Install the IPLock chip on the board. Step 5: IP core protection completed! 【Secrets of Robust Protection】 - Adopts AES-128 encryption method. - Changes and encrypts authentication data at a cycle of 5 times per second. - Generates a completely random seed using a natural random circuit. - If the encryption processing chip is removed, the logic function stops. 【Product Lineup Supporting Prototyping and Mass Production】 - "Laboratories Pack" for small-scale prototyping. - "Writer Set" for mass production.
Price range
Delivery Time
P3
Applications/Examples of results
Customers will be able to safely borrow and license FPGA products. 【Main Adoption Results】 - Copy protection for image processing boards for overseas markets - Copy protection for FPGA IP - ID for security module boards
Line up（4）
| Model number | overview |
|---|---|
| IPL-010L | IPLock Laboratories Pack - Pack of 10 pre-programmed encryption chips |
| IPL-030L | IPLock Laboratories Pack - Pack of 30 pre-programmed encryption chips |
| IPL-003WR | IPLock Writer Set - Includes 3 blank encryption chips (IPL-CHP) |
| IPL-CHP | Blank encryption chip * Sold in units of 100 |
catalog（2）
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Company information
Design Gateway is a pioneer in the development and sales of advanced IP cores, with over 30 years of experience in the FPGA industry.
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