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  6. USB 3.0 IP core for FPGA

USB 3.0 IP core for FPGA

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USB3.0-IP

last updated:Aug 30, 2016

デザイン・ゲートウェイ
デザイン・ゲートウェイ
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With the USB3.0 IP core, it is possible to develop a highly versatile FAT32 data recorder in a short period of time!

The 【USB3.0-IP】 complies with the USB3.0 standard Revision 1.0 and includes both the link layer and protocol layer, making it easy to implement a USB3.0 interface when combined with an external PHY chip from TI. A reference design compatible with Xilinx/Altera FPGAs is included as standard with the core product, which can help shorten product development time.

    ASIC
USB3+AB07.jpg

USB 3.0 IP core for FPGA

USB3+AB07.jpg
USB3+AB07.jpg
  • Related Link - http://www.dgway.com/USB3-IP_X.html

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basic information

■Compliant with USB 3.0 Specification Revision 1.0 ■Provides host controller or device controller ■Includes link layer and protocol layer ■Physical layer interfaces with TI's PHY chip ■Core frequency can be selected at 250MHz for PIPE connection and over 125MHz internally ■Supports 16-bit USB 3.0 PIPE interface ■Supports up to 15 IN/OUT route points (host side IP) or endpoints (device side IP) (1 control, 7 IN/OUT each) ■Supports all transfer types (Control transfer, Bulk transfer, Isochronous transfer, Interrupt transfer) ■Reliable domestic support

Price range

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Delivery Time

P3

※It is necessary to conclude a license agreement.

Applications/Examples of results

It is possible to easily implement a FAT32 data recorder system on the USB 3.0 device side IP core. ■ Since it is recognized as FAT32 external storage by the OS, no drivers are needed for either Windows or Linux!! ■ We have prepared a reference design that operates on actual hardware. ■ Free evaluation demos are available on Altera/Xilinx FPGA boards.

Detailed information

  • USB3FAT32.jpg

    Application example: FAT32 recorder (device side) It is possible to easily implement a FAT32 data recorder system on the USB 3.0 device side using an IP core.

Line up(16)

Model number overview
USB3H-IP-KT7 USB 3.0 (Host) IP for Kintex-7
USB3H-IP-VT6 USB 3.0 (Host) IP for Virtex-6
USB3H-IP-ZQ7 USB 3.0 (Host) IP for Zynq-7000
USB3D-IP-KT7 USB 3.0 (Device) IP for Kintex-7
USB3D-IP-VT6 USB 3.0 (Device) IP for Virtex-6
USB3D-IP-ZQ7 USB 3.0 (Device) IP for Zynq-7000
USB3H-IP-S4 USB 3.0 (Host) IP for Stratix-IV
USB3H-IP-A5 USB 3.0 (Host) IP for Arria-V
USB3H-IP-A2 USB 3.0 (Host) IP for Arria-II
USB3H-IP-C4 USB 3.0 (Host) IP for Cyclone-IV
USB3H-IP-C5 USB 3.0 (Host) IP for Cyclone V
USB3D-IP-S4 USB 3.0 (Device) IP for Stratix-IV
USB3D-IP-A5 USB 3.0 (Device) IP for Arria-V
USB3D-IP-A2 USB 3.0 (Device) IP for Arria-II
USB3D-IP-C4 USB 3.0 (Device) IP for Cyclone-IV
USB3D-IP-C5 USB 3.0 (Device) IP for Cyclone V

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Design Gateway Comprehensive Catalog (Xilinx Edition)

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Company information

デザイン・ゲートウェイ

デザイン・ゲートウェイ

Electronic Components and Semiconductors

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Design Gateway is a pioneer in the development and sales of advanced IP cores, with over 30 years of experience in the FPGA industry.

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