Equipped with a self-test! Supports power modes (partial/slumber).
We would like to introduce our "SATA Host APP IP Core for FPGA and ASIC." This is an IP core for SATA hosts that complies with the SATA 3.3 standard and supports a maximum transfer rate of 6Gbps (600MB/s). It consists of the PHY layer, LNK layer, TRN (Transport) layer, application layer, SerDes, and FIFO interface. 【Specifications】 ■ Complies with SATA Revision 3.3 standard (1.5Gbps, 3.0Gbps, 6.0Gbps) ■ Supports OOB (Out of Band) ■ Uses FIFO for the DATA interface ■ Supports either SerDes, PIPE, or SAPIS interfaces ■ Supports power modes (partial/slumber) ■ Equipped with self-test functionality *For more details, please download the PDF or feel free to contact us.
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basic information
【Provided Items】 ■Encrypted RTL code or Verilog HDL source code ■Reference design (peripheral circuits, sample software) ■Timing constraint file ■User manual ■Test bench (supports only ModelSIM and Xsim) *For more details, please download the PDF or feel free to contact us.
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Company information
Fujisoft has a history of 40 years in embedded development since its founding, accumulating various experiences in both software and hardware. Based on the experience cultivated over many years, a team of over 2,000 embedded technology experts provides embedded services across a wide range of fields, including automotive, medical, industrial, and home appliances. Our seamless development system, covering everything from hardware to software, allows our consultants to propose solutions starting from the "soft phase," such as requirements specification, and we offer a consistent solution that encompasses development, research, testing, and production.
