Enhancing the stack-up design process of printed circuit boards with high-precision field solvers, loss planning environments, and a complete library of dielectric materials.
The issue of stack-up is one of the main causes of board respins that everyone wants to avoid. Among the many stack-up tools available, only Z-planner Enterprise can enhance the stack-up design process with high-precision field solvers, loss planning environments, and a complete library of dielectric materials, all of which interface seamlessly with widely used signal integrity software.
As edge rates become increasingly faster, accurate calculations of loss and impedance using real dielectric material data are essential for correctly designing the stack-up from the outset.
【Features】
• Integration of HyperLynx field solver
• Unlimited number of layers and impedance groups
• Advanced stack-up wizard
• Compare stack-ups from various fabs against specifications and ensure DFX rules are applied
• Consideration of glass properties to mitigate shifts caused by glass weaving
• Import stack-ups from the manufacturing department with detailed manufacturing properties added
*For more details, please download the PDF or contact us.
