Aldec announces HES-DVM Proto "Cloud Edition" - making access to FPGA-based ASIC and SoC prototyping easier.

Henderson, NV, USA – June 2, 2021 – Aldec, Inc. (hereinafter referred to as "Aldec"), a pioneer in HDL mixed-language simulation and hardware-assisted verification for FPGA and ASIC, has released the HES-DVM Proto Cloud Edition (CE). The HES-DVM Proto CE is offered through Amazon Web Services (AWS) and can be used for FPGA-based prototyping of SoC/ASIC designs. It also focuses on automatic partitioning of designs, significantly reducing startup time when up to four FPGAs are required to accommodate the design.
Please refer to the attached document for more details.

Inquiry about this news
Contact Us OnlineMore Details & Registration
Details & Registration
Related Documents
Related Links
Press Release
Product Page