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  1. Home
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  3. アルデック・ジャパン
IT/Telecommunications
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アルデック・ジャパン

number of employees3
addressTokyo/Shinjuku-ku/6th Floor, Nishishinjuku Mizuma Building, 3-3-13 Nishishinjuku
phone03-6693-4146
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last updated:Jun 02, 2022
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  • Products/Services(35)
  • catalog(30)
  • news(96)

アルデック・ジャパン Company Overview

It is used in the development of large-scale FPGA/ASIC/SoC and embedded system designs.

Aldec Japan, Inc. is a leading EDA tool vendor in the industry, releasing innovative design creation, simulation, verification solutions, and a variety of development boards, which are adopted for the development of large-scale FPGA/ASIC/SoC and embedded system designs. The fields we are involved in span various areas, including telecommunications, automotive, educational and research institutions, and the aerospace industry. Please feel free to contact us if you have any inquiries.

Business Activities

Sales, technical support, and maintenance services for Aldec products in Japan.

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Products/Services (35)

HES-VU19PD-ZU7EV product image
HES-VU19PD-ZU7EV
TySOM-M Embedded Prototyping Board product image
TySOM-M Embedded Prototyping Board
HES Proto-AXI product image
HES Proto-AXI
Technical Document: "How to Connect External Devices to the Emulation Verification Environment" product image
Technical Document: "How to Connect External Devices to the Emulation Verification Environment"

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catalog(30)

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HES-VU19PD-ZU7EV

HES-VU19PD-ZU7EV

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TySOM-M-MPFS250

TySOM-M-MPFS250

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[Information] Making the TySOM Zynq-based embedded development board compatible with AWS IoT Greengrass.

[Information] Making the TySOM Zynq-based embedded development board compatible with AWS IoT Greengrass.

TECHNICAL
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[Data] Performing cross-spectral video processing on the TySOM-3 board.

[Data] Performing cross-spectral video processing on the TySOM-3 board.

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news(96)

Free Webinar: Design and Verification Process of DO-254 Projects Using AC-20-152A Guidance

  • SEMINAR_EVENT

The RTCA/DO-254, published in 2000, serves as a guideline for the development of airborne electronic equipment equipped with FPGA/ASIC according to standards; however, in recent designs, its content has become outdated. EASA and FAA have aimed to harmonize compliance standards, and at the same time, issued AMC 20-152A/AC 20-152A as new objectives that DO-254 applicants should meet. This webinar will introduce an overview of this new document, as well as discuss its impact on the design and verification processes of airborne electronic equipment and appropriate tools for streamlining these processes.

Oct 30, 2026

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Free Webinar: A Shortcut to Building UVM Verification Environments

  • SEMINAR_EVENT

UVM (Universal Verification Methodology) is one of the verification methods that enables advanced verification flows for ASICs and large-scale FPGAs. However, writing UVM from scratch is a complex and time-consuming task. The UVM generator in Riviera-PRO reduces complexity by automatically generating SystemVerilog templates for UVM test benches and simulation scripts for designs written in VHDL, Verilog/SystemVerilog, rather than starting from scratch. This webinar will focus on how to use the UVM generator and the benefits it brings to users who create UVM code from scratch.

Oct 30, 2026

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Free Webinar: High-Quality CDC Verification of Vivado Projects with ALINT-PRO

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As FPGA designs become larger and more complex, the importance of clock domain crossing (CDC) verification is increasingly emphasized. Improper handling of asynchronous clock boundaries can lead to metastability, glitches, and loss of data integrity, potentially causing unpredictable behavior in hardware. The AMD (Xilinx) Vivado Design Suite includes built-in CDC checking features, but these may be insufficient for complex multi-asynchronous clock designs. While Vivado's CDC report feature provides useful information through Xilinx-specific checks such as the ASYNC_REG attribute, it does not match the detailed analytical capabilities of dedicated CDC verification tools like ALINT-PRO. In this webinar, we will compare Vivado's built-in CDC verification capabilities with the advanced features of ALINT-PRO, highlighting CDC issues that may be overlooked in Vivado and demonstrating how ALINT-PRO can enhance CDC analysis and debugging.

Oct 02, 2026

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Detailed information

Company name アルデック・ジャパン
number of employees3
Contact addresspostalcode 160-0023 Tokyo/ Shinjuku-ku/ 6th Floor, Nishishinjuku Mizuma Building, 3-3-13 NishishinjukuView on map TEL:03-6693-4146 FAX:03-4563-9760
Industry IT/Telecommunications

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