A new HES board ideal for prototyping and emulation of medium to large-scale ASIC/SoC designs.

Henderson, NV, USA – July 19, 2021 – Aldec, Inc. (hereinafter "Aldec"), a pioneer in HDL mixed-language simulation and hardware-assisted verification for FPGA and ASIC, has released the ASIC/SoC physical prototyping/hardware emulation board "HES-VU19PD-ZU7EV," which supports designs of approximately 83M ASIC gates.
Compared to boards of the same capacity, the HES-VU19PD-ZU7EV uses only two FPGAs for logic. This facilitates FPGA partitioning and reduces the time required to launch design projects targeting mid-sized ASICs or SoCs. Additionally, for large designs, it can achieve functionality equivalent to 332M ASIC gates by connecting four boards via a high-speed backplane (scheduled for release later this year). By interconnecting the backplanes (up to three), it is also possible to support designs of approximately 996M ASIC gates.
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