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  6. HES-VU19PD-ZU7EV

HES-VU19PD-ZU7EV

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HES-VU19PD-ZU7EV

last updated:Aug 19, 2021

アルデック・ジャパン
アルデック・ジャパン
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A prototyping board equipped with two of the largest Virtex UltraScale+ and one Zynq UltraScale+.

The HES-VU19PD-ZU7EV is a unique combination featuring two Virtex UltraScale+ VU19P FPGAs as logic modules and one Xilinx Zynq UltraScale+ ZU7EV MPSoC as a host module. It is equipped with a quad-core ARM Cortex-A53, a dual-core ARM Cortex-R5 real-time processing unit, an ARM Mali-400 MP2 GPU, an integrated H.264/H.265 video codec, and UltraScale+ programmable logic. This board targets high-speed physical prototyping and emulation for medium to large-scale ASIC designs. The HES-VU19PD-ZU7EV provides 83M ASIC gates and can reach up to 316M gates through the backplane. The board includes five SODIMM external memory slots, with four connected to the VU19P device and one to the ZU7EV device. The on-chip memory for the VU19P device is 166Mb, while the ZU7EV device has 11Mb.

    ASIC
HES-XCVU19PD-XCZU7EV_3.jpg

HES-VU19PD-ZU7EV

HES-XCVU19PD-XCZU7EV_3.jpg
HES-XCVU19PD-XCZU7EV_3.jpg
  • Related Link - https://www.aldec.com/jp/products/emulation/hes_fp…

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basic information

FPGA - 2x Xilinx Virtex UltraScale+ XCVU19P-FSVB3824 - Xilinx Zynq Ultrascale+ ZU7EV-FFVC1156 Memory - 4x SODIMM DDR4 slots (XCVU19P) - 1x SODIMM DDR4 slot (ZU7EV) - Quad SPI Flash (ZU7EV) - NVMe M.2 PCIe SSD Interfaces (ZU7EV) - PCIe 3.0 x8 - UART - USB - MicroSD - 1Gb Ethernet Interfaces (XCVU19P) - 2x FMC standard connector Vita 57.4 - 2x QSFP-DD Interfaces - BP Connector - PCIe switch PCIe x8 Gen3 for ZU7EV and x16 for XCVU19P

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Prototyping

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  • HES-VU19PD-ZU7EV_Block_Diagram_hi.jpg

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HES-VU19PD-ZU7EV

HES-VU19PD-ZU7EV

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A new HES board ideal for prototyping and emulation of medium to large-scale ASIC/SoC designs.

  • Product news

Henderson, NV, USA – July 19, 2021 – Aldec, Inc. (hereinafter "Aldec"), a pioneer in HDL mixed-language simulation and hardware-assisted verification for FPGA and ASIC, has released the ASIC/SoC physical prototyping/hardware emulation board "HES-VU19PD-ZU7EV," which supports designs of approximately 83M ASIC gates. Compared to boards of the same capacity, the HES-VU19PD-ZU7EV uses only two FPGAs for logic. This facilitates FPGA partitioning and reduces the time required to launch design projects targeting mid-sized ASICs or SoCs. Additionally, for large designs, it can achieve functionality equivalent to 332M ASIC gates by connecting four boards via a high-speed backplane (scheduled for release later this year). By interconnecting the backplanes (up to three), it is also possible to support designs of approximately 996M ASIC gates. Please refer to the attached document for more details.

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アルデック・ジャパン

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Aldec Japan, Inc. is a leading EDA tool vendor in the industry, releasing innovative design creation, simulation, verification solutions, and a variety of development boards, which are adopted for the development of large-scale FPGA/ASIC/SoC and embedded system designs. The fields we are involved in span various areas, including telecommunications, automotive, educational and research institutions, and the aerospace industry. Please feel free to contact us if you have any inquiries.

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