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  4. Free Webinar: Let's Try Using SystemVerilog's Constrained Random
SEMINAR_EVENT
  • Jul 02, 2026
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Jul 02, 2026

Free Webinar: Let's Try Using SystemVerilog's Constrained Random

アルデック・ジャパン アルデック・ジャパン
Code coverage and functional coverage are widely used to evaluate the comprehensiveness of verification. However, improving coverage requires a vast number of test benches and stimuli. Traditional direct testing is easy to use for checking the functions to be verified, but it cannot test for unexpected content. Additionally, conventional simple random testing may generate unnecessary stimuli. SystemVerilog's constrained random feature allows for the control of random number generation through constraints, enabling the generation of diverse stimuli within a single test bench. This results in improved coverage rates with minimal test bench descriptions. In this webinar, we will introduce techniques related to the description and constraints of SystemVerilog's constrained random feature.
Date and time Wednesday, Jul 29, 2026
03:00 PM ~ 04:00 PM
Capital
Entry fee Free
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FPGA Development Integrated Environment Active-HDL

Equipped with features suitable for FPGA design and verification.

Active-HDL is an integrated solution for FPGA design creation and simulation in a team environment that operates on Windows. The Active-HDL integrated design environment (IDE) includes complete HDL and graphical design tools, as well as a mixed-language simulator for RTL/gate-level, enabling the development and verification of FPGA designs in a short period of time. *For more details, please download the PDF (English version) or feel free to contact us.*

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Riviera-PRO.jpg

High-speed RTL simulator "Riviera-PRO"

We will meet the verification needs of engineers creating next-generation FPGAs and SoCs!

Riviera-PRO meets the verification needs of engineers creating next-generation cutting-edge FPGAs and SoCs. It enables the maximization of test bench productivity, reusability, automation through the integration of high-performance simulation engines and debugging features at various levels of abstraction, as well as support for the latest languages and verification library standards. *For more details, please refer to the PDF materials or feel free to contact us.*

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FPGA Development Integrated Environment Active-HDL

FPGA Development Integrated Environment Active-HDL

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High-speed RTL simulator "Riviera-PRO"

High-speed RTL simulator "Riviera-PRO"

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JASIS 2025

We will exhibit at JASIS 2025, held from September 3 to 5, 2025!

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We will be exhibiting at the JASIS exhibition held at Makuhari Messe International Exhibition Hall this year as well. [Exhibited Products] ■ High-resolution ICP optical emission spectrometer ■ Continuous light source atomic absorption spectrometer ■ TOC analyzer ■ Microwave sample digestion system [Exhibitor Seminars (New Technology Presentations)] ■ September 3 (Wed) 12:00–12:30 [Atomic Absorption] Venue: Makuhari Messe Conference Hall, Room 101 Surpassing the limits of atomic absorption analysis! A xenon continuous light source atomic absorption spectrometer that achieves efficient measurements like ICP-OES with easy operation. ■ September 4 (Thu) 15:00–15:30 [ICP-OES] Venue: TKP (formerly APA) Venue, Room No. 7 How far can we go? High-sensitivity analysis using a high-resolution ICP optical emission spectrometer equipped with an Echelle double monochromator and CCD detector. ■ September 5 (Fri) 15:00–15:30 [Trace Nitrogen, Sulfur, Chlorine] Venue: TKP (formerly APA) Venue, Room No. 1 Fully compliant with petrochemical JIS standards! A multifunctional nitrogen, sulfur, and chlorine analyzer that condenses solutions for routine analysis and research and development challenges into one device.

Jul 13, 2026

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[Seminar] Winning Strategies for Business and Investment Derived from 17 Key Strategies

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[Speaker] Nobuki Kawaguchi, Executive Chief Scientist, Astamuse Inc., Technology Intelligence Division [Key Lecture Content] "Japan Restart: Winning Strategies and Strategic Necessity for Japanese Companies" is a strategic document that connects the next 30 years of Japan to corporate management and investment decisions, based on the 17 key strategic areas outlined by the Takai administration. The central concepts are "strategic autonomy, strategic necessity, and chokepoints." It features data-driven analysis layered with primary information from over 1 billion innovation data points across 193 countries. [Lecture Items] <Part 1> Introduction: Overall Design and Three Key Concepts <Part 2> Highlights of Each Chapter = A Continuous "Industry Map" (approximately 60 minutes) <Part 3> Chokepoint Candidates and Latest Examples (approximately 40 minutes) Q&A / Business Card Exchange

Jul 10, 2026

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[Seminar] Market Environment and Future Outlook of VPP and Grid-Connected Battery Business

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[Speaker] ENEOS Power Co., Ltd. VPP Business Division VPP Business Planning Group Manager Yoshio Kyoraishi [Key Lecture Content] As one of the means of monetization in the VPP and grid storage battery business, considering entry into the demand-supply adjustment market has become unavoidable. On the other hand, due to rapid changes in the system since the start of trading for all products (April 2024), the difficulty of considering market entry has increased. In this situation, it is important to accurately capture the changes in market systems and predict the future market environment to proceed with considerations. In this lecture, we will organize the means of monetization, market environment, and market systems in the VPP and grid storage battery business, and discuss future prospects. [Lecture Items] 1. Means of Monetization 2. Market Environment 3. Market System 4. Future Prospects 5. ENEOS Power's Business Development 6. Summary 7. Q&A / Business Card Exchange

Jul 10, 2026

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Notice of participation in the 38th EMC and Noise Control Technology Exhibition from July 15 (Wednesday) to July 17 (Friday), 2026.

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Takeuchi Kogyo Co., Ltd. will exhibit at the "39th EMC and Noise Control Technology Exhibition," which is part of TECHNO-FRONTIER 2026, held at Tokyo Big Sight from Wednesday, July 15 to Friday, July 17, 2026. Venue: Tokyo Big Sight, West Hall 3 Booth Number: 3-H14

Jul 10, 2026

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DevSecOps Implementation Challenges Solution Seminar

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The speed of application development is changing significantly. While the use of cloud, agile methodologies, in-house development, and generative AI is advancing, it has become increasingly difficult to sufficiently mitigate development risks through post-process checks by the security department alone. Additionally, there are expectations for the evolution of security measures through the use of generative AI, and the realization of advanced DevSecOps using AI is anticipated to become important in the future. This seminar will explain the challenges commonly faced when practicing DevSecOps, such as clarifying the lacking security measures, prioritizing those measures, and enhancing DevSecOps through the use of AI. This content is a must-see for those in information systems, security, development, and operations who are struggling with promoting DevSecOps.

Jul 10, 2026

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