Free Webinar: In a nutshell, FPGA Design Verification Part 1
With the evolution of FPGA technology, traditional programmable logic domains have been supplemented by CPUs, GPUs, and high-speed peripherals, making design verification increasingly challenging. Relying solely on physical verification for FPGA testing is clearly insufficient for safety-critical designs, and FPGA teams are adopting advanced design verification methodologies and techniques to develop their own verification processes. In this webinar, we will outline advanced simulation-based verification processes, FPGA-centric verification processes, and how to create verification plans, including what to verify and how to do so.

| Date and time | Wednesday, Oct 22, 2025 03:00 PM ~ 04:00 PM |
|---|---|
| Entry fee | Free |
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