Research Report "Chiplets and Advanced Packaging in the World"

Chiplets are a technology that integrates multiple chips into a single package, necessitating new testing methods not only for traditional chip-level testing but also specifically for chiplets. This course will introduce the fundamental technologies of electronic circuit testing, followed by an overview of chiplets, the concepts of chiplet testing, testing methods for true KGD (Known Good Die) selection, challenges and latest trends in wafer probing, testing of interposers, system-level testing, SDC (Silent Data Corruption), boundary scan for chiplet interconnect testing and the IEEE 1838 standard, TSV connection failure repair methods and the UCIe standard, as well as new measurement methods to evaluate ultra-narrow pitch TSV connections such as hybrid bonding. Target Audience for the Seminar: Individuals interested in the implementation and testing of chiplets. Knowledge Gained from the Seminar: - Basic knowledge of electronic circuit testing - Overview of chiplets - Concepts and trends in chiplet testing - Basic knowledge of boundary scan and chiplet testing standard IEEE 1838 - TSV connection failure avoidance technologies and UCIe standard - New evaluation techniques for TSV connections using analog boundary scan

Semiconductors are protected using resin encapsulation methods. In the future, general-purpose semiconductors will continue to apply this technology. On the other hand, advanced semiconductors are transitioning to accommodate larger semiconductor areas due to the slowdown in the speed of high integration. Additionally, there is a demand for compatibility with new semiconductors (such as GPUs) that incorporate AI. These movements lead to the modularization of semiconductors, necessitating a review of encapsulation technologies. For example, this includes changes in thermal distortion countermeasures and transformations in protection methods. This time, we will provide a clear explanation of the encapsulation technologies that continue to support general-purpose semiconductors and those required for advanced semiconductors. 【Target Audience for the Seminar】 - Individuals involved in the semiconductor industry (engineers, sales, etc.) who are interested in encapsulation technology - Those who have an interest in semiconductor encapsulation technology in general (development history, trends, etc.) 【Knowledge Gained from the Seminar】 - Basic knowledge of semiconductor packaging as a whole - Basic knowledge of semiconductor packaging materials - Development history and trends of semiconductor packages