7/3 Webinar on Backend Processes, Assembly, and Design in Semiconductor Manufacturing
■Title
"Fundamentals of Backend Processes, Packaging, and Design in Semiconductor Manufacturing"
This seminar offers a systematic learning experience about backend processes and packaging technologies that support the high performance and functionality of semiconductors, covering everything from the basics to the latest trends. Experienced instructors will clearly explain the history of semiconductor package evolution, various package types, packaging processes, encapsulation technologies, and evaluation and analysis techniques. Additionally, the latest trends in advanced packaging technologies such as 2.5D/3D packaging, CoWoS, chiplets, hybrid bonding, and optoelectronic integration technologies that support the AI era will also be introduced. This content is recommended for engineers and researchers in fields such as chemistry, electronic components, and the automotive industry who wish to learn semiconductor packaging technology from the ground up.
■Event Details
Date and Time: July 3, 2026 (Friday) 13:30–16:30
Instructor: Yosuke Hirumuta
(Hirumuta Engineering Office, Quality and Technology Consultant)
Participation Fee: 44,000 yen (tax included)
Newsletter Member Price: 39,600 yen (tax included)
Delivery Format: Live streaming via Zoom

| Date and time | Friday, Jul 03, 2026 |
|---|---|
| Entry fee | Charge Tuition fee: 44,000 yen (tax included) *Includes materials *Price for our newsletter subscribers (registration free): 39,600 yen (tax included) |
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