Book "Latest Trends in Semiconductor Packaging Technology and Design/Evaluation of Semiconductor Encapsulation Materials"

■Title "Fundamentals of Backend Processes, Packaging, and Design in Semiconductor Manufacturing" This seminar offers a systematic learning experience about backend processes and packaging technologies that support the high performance and functionality of semiconductors, covering everything from the basics to the latest trends. Experienced instructors will clearly explain the history of semiconductor package evolution, various package types, packaging processes, encapsulation technologies, and evaluation and analysis techniques. Additionally, the latest trends in advanced packaging technologies such as 2.5D/3D packaging, CoWoS, chiplets, hybrid bonding, and optoelectronic integration technologies that support the AI era will also be introduced. This content is recommended for engineers and researchers in fields such as chemistry, electronic components, and the automotive industry who wish to learn semiconductor packaging technology from the ground up. ■Event Details Date and Time: July 3, 2026 (Friday) 13:30–16:30 Instructor: Yosuke Hirumuta (Hirumuta Engineering Office, Quality and Technology Consultant) Participation Fee: 44,000 yen (tax included) Newsletter Member Price: 39,600 yen (tax included) Delivery Format: Live streaming via Zoom

Title: "Fundamentals of Semiconductor Packaging Technology ~ From the Evolution of Package Types to Manufacturing Processes, Equipment and Materials Used, and Latest Trends ~" This is an introductory seminar where you can systematically learn about semiconductor packaging technology from the basics to advanced techniques. It provides a clear explanation of the role of packaging technology that supports the high performance of semiconductors, its background of evolution, manufacturing processes, and materials and equipment technologies. In addition to the characteristics of various package types such as DIP, QFP, BGA, and WLCSP, it also details major manufacturing technologies like back grinding, dicing, die bonding, wire bonding, and molding. Furthermore, you will learn about the trends and future prospects of the latest technologies such as SiP, FOWLP, CoWoS, EMIB, chiplets, and optoelectronic integrated packaging. This content is ideal for semiconductor engineers as well as sales and marketing personnel who want to understand packaging technology from the ground up.

■ Title: "Changes in Joint Structures and Packaging Correspondence Due to the Evolution of Semiconductors - Response of Resin Sealing Technology to the Increase in the Number of Joint Locations and Narrow Spacing -" ――Organizing the core of joint design and sealing technology essential for the WLP and 3D assembly era. Covering failure mechanisms and countermeasures associated with high integration, providing insights directly related to development, evaluation, and mass production challenges. ■ Date and Time: May 15, 2026 (Friday) 13:00 - 16:30 ■ Zoom Streaming (with materials) 【Knowledge Gained from the Seminar】 - Development history and trends of semiconductor packaging - Changes in semiconductor joint structures and the current status of packaging technology - Evolution of semiconductor packaging and the development history, challenges, and countermeasures of resin sealing technology 【Target Audience for the Seminar】 - Stakeholders in the semiconductor-related fields (sales, technical positions, etc.) - Individuals interested in semiconductor manufacturing technology (front-end, back-end, etc.) - Those interested in the evolution of semiconductor packaging and the corresponding packaging technology - Individuals interested in semiconductor integration = bonding technology (Bumping Technology)

■Title: "Latest Trends in Semiconductor Packaging and Design/Evaluation Techniques for Semiconductor Encapsulation Materials" ――As chipletization and 3D packaging advance in semiconductors, more sophisticated material design for encapsulants is required than ever before. This seminar will provide a detailed practical perspective on the latest trends in semiconductor packaging, covering raw material selection, design techniques, and reliability evaluation of encapsulants. ■Date and Time: April 17, 2026 (Friday) 13:30–16:30 ■Target Audience: Designers of semiconductor encapsulation materials, engineers using semiconductor encapsulation materials, designers of epoxy resins and hardeners for semiconductor encapsulation materials ■Knowledge Gained from the Seminar: - Trends in semiconductor packaging - Knowledge about raw materials for semiconductor encapsulation materials - Design techniques for semiconductor encapsulation materials and evaluation techniques for semiconductor encapsulation materials