11/10 Webinar Advanced Semiconductor Packaging Technology
■Title: "The Complete Picture of Advanced Semiconductor Packaging Technology - From 2.5D/3D and Chiplets to Thermal and Power Solutions, Reliability Evaluation, and PFAS Compliance -"
――A systematic explanation of advanced packaging technologies that support the evolution of AI semiconductors. In addition to the latest technological trends in 2.5D/3D packaging, chiplets, CoWoS, TSV, and glass core substrates, you will learn broadly about manufacturing processes, yield improvement, failure analysis, reliability evaluation, PFAS regulatory compliance, and thermal and power design. Practical case studies and evaluation analysis techniques directly related to work will also be explained in detail.
- Basics of semiconductor packaging technology and the evolution of trends
- Latest trends in 2.5D/3D and chiplet technology
- Reliability testing and failure analysis techniques
- Key points for yield improvement
- PFAS regulatory compliance and sustainable materials
- Thermal and power design technologies for advanced packaging aimed at AI
- Engineers and researchers from chemical, electronics, electrical, and automotive manufacturers
- Personnel involved in semiconductor backend processes and assembly technologies
- Personnel involved in materials and equipment development
- Those who want to systematically learn about advanced packaging technologies

| Date and time | Tuesday, Nov 10, 2026 10:30 AM ~ 04:30 PM |
|---|---|
| Entry fee | Charge Participation fee: 55,000 yen (tax included) *Includes materials *For our newsletter members (registration is free) 49,500 yen (tax included) ★If two or more people apply at the same time and all applicants register as newsletter members, the participation fee per person will be half of the newsletter member price. |
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