From chiplets and CoWoS to optoelectronic integration. A systematic explanation of semiconductor packaging technology from the basics to the latest trends.
Title: "Fundamentals of Semiconductor Packaging Technology ~ From the Evolution of Package Types to Manufacturing Processes, Equipment and Materials Used, and Latest Trends ~" This is an introductory seminar where you can systematically learn about semiconductor packaging technology from the basics to advanced techniques. It provides a clear explanation of the role of packaging technology that supports the high performance of semiconductors, its evolutionary background, manufacturing processes, and materials and equipment technologies. In addition to the characteristics of various package types such as DIP, QFP, BGA, and WLCSP, it also details major manufacturing technologies such as back grinding, dicing, die bonding, wire bonding, and molding. Furthermore, you will learn about the trends and future prospects of the latest technologies such as SiP, FOWLP, CoWoS, EMIB, chiplets, and optoelectronic integration packaging. This content is ideal for semiconductor engineers as well as sales and marketing personnel who want to understand packaging technology from the ground up.
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basic information
■Seminar Title Fundamentals of Semiconductor Packaging Technology ~ From the Evolution of Packaging Forms to Manufacturing Processes, Equipment and Materials Used, and Latest Trends ~ ■Event Details Date and Time: July 2, 2026 (Thursday) 13:30 - 16:30 Instructor: Akira Isobe (President and CEO of ISTL Co., Ltd.) Participation Fee: 44,000 yen (tax included) *Price for our newsletter subscribers (free registration): 39,600 yen (tax included) Delivery Format: Live streaming via Zoom ■Main Lecture Content - Role and Requirements of Semiconductor Packaging - Evolution of Packaging Forms and Key Technologies - Manufacturing Processes and Materials/Equipment Used - FOWLP, CoWoS, EMIB, Chiplet Technology - Photonic-Electric Hybrid Packaging - Future Technology Trends and Outlook
Price information
Tuition fee: 44,000 yen (tax included) *Includes materials *For our newsletter subscribers (registration is free): 39,600 yen (tax included) 【Newsletter Subscriber Benefits】 If two or more people apply at the same time and all applicants are registered newsletter subscribers, the participation fee per person will be half of the newsletter subscriber price.
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Applications/Examples of results
- Basic education and training for semiconductor packaging technology - Research on technological trends in advanced packaging technology - Technical training for companies related to semiconductor materials and equipment - Knowledge acquisition for sales and marketing personnel - Promotion of understanding of chiplets, SiP, CoWoS, etc. *Please check the related link URL for program details and application methods.
Company information
We provide the latest industrial insights to our clients. By conducting market trend analysis, publishing technology‑related books and research reports, and organizing and managing seminars, we support research and development across a wide range of industries, with a primary focus on manufacturing. Our coverage spans diverse fields such as energy, batteries, chemicals, and biotechnology.
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