List of ASIC products
- classification：ASIC
91～105 item / All 143 items
Reduce the workload from handling heavy objects! Here are five case studies that solved customer challenges! We are also accepting free consultations and tests tailored to your work!
- Other conveying machines
No more need to lift heavy one-gallon cans! Enjoy comfortable liquid transfer in the central kitchen.
- Other Pumps
Decision to exhibit at the 1st Chubu Food Industry Creation Exhibition '26!
We will be exhibiting at the "1st Chubu Food Industry Creation Exhibition '26" to be held at Port Messe Nagoya from November 4 (Wednesday) to November 6 (Friday), 2026. As a new addition to our lineup, we will showcase the "Cordless Sanitary Handy Pump," which is a product we started selling in April last year, alongside our "Compact Sanitary Handy Pump Model MHS." - Cordless! Portable anywhere! Easy to use! Simple cleaning! It is compatible with standard 18L cans and BIB (Bag-in-Box) and features a structure that allows for easy disassembly and cleaning. We would like to invite you to visit us at this opportunity. - Venue: Port Messe Nagoya - Our exhibition booth: Hall 1 "C-66"
Our company aims to be a trusted technical service provider for our customers, guided by the principles of "SPEED, FLEXIBILITY, and QUALITY."
- ASIC
It is expected that development costs can also be kept low overall.
- ASIC
- Other electronic parts
NXP i.MX8M Mini equipped with Toradex's Verdin family CPU module.
- Microcomputer
- ASIC
Fully utilizing the latest design and verification technologies.
- ASIC
- Other semiconductors
NXP i.MX8M Plus equipped with Toradex's Verdin family CPU module.
- Microcomputer
- ASIC
A prototyping board equipped with two of the largest Virtex UltraScale+ and one Zynq UltraScale+.
- ASIC
A new HES board ideal for prototyping and emulation of medium to large-scale ASIC/SoC designs.
Henderson, NV, USA – July 19, 2021 – Aldec, Inc. (hereinafter "Aldec"), a pioneer in HDL mixed-language simulation and hardware-assisted verification for FPGA and ASIC, has released the ASIC/SoC physical prototyping/hardware emulation board "HES-VU19PD-ZU7EV," which supports designs of approximately 83M ASIC gates. Compared to boards of the same capacity, the HES-VU19PD-ZU7EV uses only two FPGAs for logic. This facilitates FPGA partitioning and reduces the time required to launch design projects targeting mid-sized ASICs or SoCs. Additionally, for large designs, it can achieve functionality equivalent to 332M ASIC gates by connecting four boards via a high-speed backplane (scheduled for release later this year). By interconnecting the backplanes (up to three), it is also possible to support designs of approximately 996M ASIC gates. Please refer to the attached document for more details.
We will propose an FPGA design suitable for your product!
- Circuit board design and manufacturing
- Other contract services
- ASIC
Achieving 100G TCP/IP communication functionality with pure hardware logic without CPU!
- ASIC
Supports PCIe Gen4 SSD, no external memory required, 2ch RAID0, compatible with random access.
- ASIC
Achieving 25G TCP/IP communication functionality with pure hardware logic without CPU!
- ASIC
Resolve issues with the actual machine early in the design phase.
- ASIC
Resolution of reset-related issues in ASIC and FPGA design.
- ASIC
Small board 'TySOM-1' equipped with Zynq-7000 (Z-7030) and various interfaces.
- ASIC
- Embedded Board Computers
A platform capable of achieving DO-254/ED-80 verification objectives in a test environment using a target board.
- Other semiconductors
- ASIC
Free Webinar: Design and Verification Process of DO-254 Projects Using AC-20-152A Guidance
The RTCA/DO-254, published in 2000, serves as a guideline for the development of airborne electronic equipment equipped with FPGA/ASIC according to standards; however, in recent designs, its content has become outdated. EASA and FAA have aimed to harmonize compliance standards, and at the same time, issued AMC 20-152A/AC 20-152A as new objectives that DO-254 applicants should meet. This webinar will introduce an overview of this new document, as well as discuss its impact on the design and verification processes of airborne electronic equipment and appropriate tools for streamlining these processes.