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IP Cores Product List and Ranking from 29 Manufacturers, Suppliers and Companies | IPROS GMS

Last Updated： Aggregation Period:Feb 04, 2026～Mar 03, 2026
This ranking is based on the number of page views on our site.

IP Cores Manufacturer, Suppliers and Company Rankings

Last Updated： Aggregation Period:Feb 04, 2026～Mar 03, 2026
This ranking is based on the number of page views on our site.

  1. 富士ソフト インダストリービジネス事業部 Kanagawa//software
  2. デザイン・ゲートウェイ Tokyo//Electronic Components and Semiconductors
  3. Euresys Japan ユレシス　ジャパン Kanagawa//Electronic Components and Semiconductors
  4. 4 サイレックス・テクノロジー Kyoto//Other manufacturing
  5. 5 ネットワークアディションズ Kanagawa//IT/Telecommunications
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IP Cores Product ranking

Last Updated： Aggregation Period:Feb 04, 2026～Mar 03, 2026
This ranking is based on the number of page views on our site.

  1. Wireless LAN Survey "WM-100" サイレックス・テクノロジー
  2. TOE10G-IP core for FPGA デザイン・ゲートウェイ
  3. A system to notify when passing by to prevent forklift accidents in the factory. パシフィック湘南
  4. 4 IP core for FPGA/ASIC NVMe Target 富士ソフト インダストリービジネス事業部
  5. 5 JPEG compression IP core (Verilog) メティエ

IP Cores Product List

1～30 item / All 117 items

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Equipment Abnormality Wireless Monitoring System

Equipment Abnormality Wireless Monitoring System

The "abnormal equipment alarm signal monitoring system" is configured solely by setting the radio equipment.

This is a system that reports abnormal occurrences to the management location when an abnormal signal is emitted from factory equipment. The abnormal signals from the factory equipment are input into the UMDI-41AXS and transmitted via 920MHz wireless communication to the UMIO-88AXS at the management location. The setup software for the UMIO-88AXS and UMDI-41AXS can be downloaded for free from our company website. - Easy setup by connecting the PC to the device via cable. - Communication range of 1 km in outdoor line of sight. - Communication using repeaters is possible. - Repeater settings can also be configured with the same software. Signal collection for the documentation is done via 1-to-N communication. Example: 1-to-N (1 point dispersed mode) setting. In the case of one master unit, UMIO-88AXS, and one slave unit, UMDI-41AXS (1 point input), a maximum of 8 slave units can be configured for an abnormal signal monitoring system. A demo unit is also available for your use.

  • Wireless LAN
  • IP Cores

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Sprite Drawing IP Core (Verilog)

Sprite Drawing IP Core (Verilog)

Sprite Drawing IP Core (Verilog)

This process overlays character images (sprites) onto a background image. The maximum image size is 1024x1024. Arbitrary angle rotation in 0.35-degree increments. During rotation, a bi-linear interpolated image is created. Mirror flipping. Alpha blending. The maximum number of overlays is 16.

  • Other semiconductors
  • IP Cores

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Enlarge/Reduce IP Core (Verilog)

Enlarge/Reduce IP Core (Verilog)

Enlarge/Reduce IP Core (Verilog)

P1_Scale performs image scaling using multi-rate signal processing in hardware. The maximum image size is 1024x1024, and the scaling ratio is N/M where N and M can be 1, 2, 3, 4, 5, 6, 7, or 8.

  • Other semiconductors
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JPEG compression IP core (Verilog)

JPEG compression IP core (Verilog)

JPEG compression IP core (Verilog)

Verilog-HDL JPEG compression IP core Compression method: JPEG Base Line method Input format: RGB 8:8:8 Output format: YUV 4:2:0 4:2:2 4:4:4 Huffman coding: Standard settings (Annex K) used Can also be set in registers Quantization table: Standard settings (Annex K) used Can also be set in registers

  • Other semiconductors
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Digital Simple Radio Transmitter "TFT405DA Model/TFR400DB Model"

Digital Simple Radio Transmitter "TFT405DA Model/TFR400DB Model"

Stable RTK-GNSS surveying is possible! Dustproof and rainproof structure compliant with IP45 for outdoor installation.

The "TFT405DA/TFR400DB" is a digital simple wireless transmitter that achieves an effective communication speed of 9600 bps. It adopts the π/4 shift QPSK modulation method and boasts one of the fastest communication speeds among digital simple wireless devices, specifically designed for data transmission. It is suitable for GPS-equipped surveying instruments, telemetry, and long-distance data transmission, with an interface that outputs and inputs at RS232C levels, making it easy to connect with external devices. 【Features】 - Achieves low power consumption with a general-purpose single-chip CPU configuration through a uniquely developed algorithm. - A license application is required to establish a simple wireless station (no radio operator qualification is necessary). - Suitable for RTK-GPS surveying instruments, telemetry, and long-distance data transmission. - Utilizes a one-touch metal connector for the connection part. - Complies with IP45 for dust and rain resistance, allowing for outdoor installation as is. *For more details, please refer to the PDF document or feel free to contact us.

  • Communications
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MTP non-volatile memory IP core 'TwinBit'

MTP non-volatile memory IP core 'TwinBit'

No need for complex memory cell configurations! We provide high-performance non-volatile memory at low manufacturing costs.

"TwinBit" is a non-volatile memory IP core that can be manufactured using standard logic processes. It is capable of over 100,000 write cycles across a wide range of processes, from the 0.18um generation to advanced 16nm generation and beyond. It provides high-performance non-volatile memory at a low manufacturing cost without requiring the complex memory cell configurations typical of conventional Flash memory. Customization is also available for various non-volatile memory core applications, ranging from 64-bit latch types to 2MByte code storage memory. 【Features】 ■ World-class smallest memory cell size ■ High-speed, low-power read operation ■ Low-voltage write operation ■ Built-in test circuits *For more details, please refer to the PDF document or feel free to contact us.

  • Memory
  • IP Cores

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MIPI solution (MIPI IP for FPGA)

MIPI solution (MIPI IP for FPGA)

We will assist in the development of products compatible with the high-speed serial interface MIPI for mobile devices.

We can provide interface IP for FPGA (CSI-2 Receiver, CSI-2 Transmitter, DSI Transmitter), as well as customization of FPGA and creation of boards.

  • Other image-related equipment
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Wireless LAN Survey "WM-100"

Wireless LAN Survey "WM-100"

Support for maintaining the on-site wireless LAN environment.

The WM-100 is a device that measures radio waves of IEEE 802.11a/b/g/n/ac and visualizes the wireless LAN environment on-site. Visualization is done using the dedicated software Wave Navigator. By separating radio wave measurement and visualization, flexible installation is possible. In addition to data collection for wireless LAN, the WM-100 is equipped with a spectrum analyzer function. This allows for monitoring both wireless LAN and other radio waves. By continuously monitoring the ever-changing wireless LAN environment in special settings such as factories and warehouses, it supports the maintenance of communication environments. 【Features】 ○ Constant visualization of the on-site wireless LAN Check the visualization status from the office or backroom ○ Ability to trace past wireless conditions Trace past wireless bandwidth information, signal strength of devices, etc. ○ Display of spectrum data Analyze and graph the components of radio waves in the 2.4GHz and 5GHz bands ○ Analysis of the wireless LAN environment Display information by wireless bandwidth For more details, please contact us or download the catalog.

  • Other network tools
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ANYTELECON General Catalog

ANYTELECON General Catalog

With a motto of peace of mind and safety, we respond to a wide variety of needs! We provide products and services that our customers can trust.

This catalog introduces "ANYTELECON," developed by professionals who have been involved in the telecommunications industry for many years, focusing on wireless remote control devices. It clearly presents product features, specifications, dimension diagrams, and more. Additionally, it includes information about after-sales service and a prompt support system, so please take a moment to read through it. [Contents (Excerpt)] ■ Benefits of Wireless Technology ■ Features of ANYTELECON ■ Set Configuration and Specifications List ■ FZ Series GZ Series AZ Series (10-point Switch Transmitter) ■ FZ Series GZ Series AZ Series (12-point Switch Transmitter) ■ FZ Series GZ Series AZ Series (16-point Switch Transmitter) *For more details, please download the PDF or feel free to contact us.

  • Remote Control
  • IP Cores

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A system to notify when passing by to prevent forklift accidents in the factory.

A system to notify when passing by to prevent forklift accidents in the factory.

Prevent contact accidents with workers. Also for confirming entry and exit among lift operators.

This time, we would like to introduce the implementation of a wireless Andon system for "accident prevention." ■ Before Implementation - Occasionally, there are people working in the forklift area, and we want to notify them when a forklift is passing through. - At the same time, we also want to inform other lift operators. *Note: Generally, entry is prohibited for people in buildings where only forklifts are entering and exiting. ■ After Implementation - Workers can now be aware of forklift passages, leading to a reduction in accidents. - Forklifts can also be aware of each other’s passages, improving work efficiency. ■ How to Use *Inside the building: One-way traffic from South (entrance) to North (exit) 1. When entering, press the "Slim Type Transmitter" installed at the South entrance to notify entry with the light from the "Patrol Light®" and the sound from the "Electronic Sound Notification Device® (Patrol Light Buzzer)." 2. When exiting, press and hold the "Slim Type Transmitter" installed at the North exit to turn off the "Patrol Light®" and the "Electronic Sound Notification Device® (Patrol Light Buzzer)." ★ Use the "Slim Type Transmitter" with a long-press erase function. ★ The "Patrol Light®" and "Electronic Sound Notification Device® (Patrol Light Buzzer)" are controlled by an "A contact receiver."

  • Other office supplies
  • Other FA equipment
  • others
  • IP Cores

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Hardware Master IP

Hardware Master IP

Japan's first! The "Ether CAT Master IP" has been born, significantly reducing software load for high-performance SoC FPGAs.

[ Solving CPU Load and Jitter Issues in EtherCAT MASTER Communication ] To allow more users to use it flexibly, we have developed an IP for SoC FPGA. The communication engine using FPGA hardware achieves high-speed communication intervals and stable communication cycles, reducing software load. <Features> ● Automatic packet generation function ● Process communication (cyclic communication) function: 62.5μs and above ● Automatic retransmission function

  • Embedded Board Computers
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HDMI Specification Transmitter IP Core "SLIPHDMILPT"

HDMI Specification Transmitter IP Core "SLIPHDMILPT"

Significant power consumption reduction has been achieved through partial CMOS logic implementation at the physical layer and low-voltage support at the logic layer.

SLIPHDMILPT is an IP core designed for mobile devices, reduced to a power consumption of 100mW or less (40mW or less for the physical layer only).

  • Microcomputer
  • IP Cores

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HDMI Receiver Link IP Core "SLISIHDMI"

HDMI Receiver Link IP Core "SLISIHDMI"

It can be easily integrated into SoCs such as HD TVs and AV receivers.

The HDMI receiver link IP core "SLISIHDMI" complies with the HDMI 1.3a standard, and when connected to the HDMI Receiver PHY IP SLIPHDMIR, it can most efficiently leverage the performance of the SLISIHDMIR HDMI Rx IP. Additionally, it is possible to customize the functions of the SLISIHDMIR HDMI Rx IP according to your requirements. For more details, please contact us.

  • Microcomputer
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30MHz Band AM Radio Transmitter

30MHz Band AM Radio Transmitter

Reliable long-distance transmission of important information without delay! A housing structure focused on lightweight design and robustness!

The "30MHz Band AM Transmitter" can reliably transmit important information over long distances without delay. It is a high-performance AM transmitter designed for use in broadcasting operations, with a rated output power of 5W/1W. Considering its use as a portable device, it features a lightweight and robust chassis structure. 【Features】 ■ Reliable long-distance transmission of important information without delay ■ Rated output power of 5W/1W ■ Usable as a portable device ■ Lightweight and robust chassis structure *For more details, please refer to the PDF document or feel free to contact us.

  • Image Transmission Equipment
  • Other network tools
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Error Correction Code "Reed-Solomon Express"

Error Correction Code "Reed-Solomon Express"

High-speed Reed-Solomon achieving a throughput of over 1 Gbps.

The "Lead Solomon Express" is an error correction encoding/decoding (Encoder/Decoder) IP core that achieves a throughput of over 1 Gbps by pipeline processing the calculation of error location polynomials and error values. It supports variable data block lengths. 【Features】 ■ Achieves a throughput of over 1 Gbps ■ Supports variable data block lengths ■ The number of check bits, primitive polynomials, and generator polynomials can be customized according to your requirements. *For more details, please refer to the PDF document or feel free to contact us.

  • Other network tools
  • others
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NVMe IP core for FPGA

NVMe IP core for FPGA

Supports PCIe Gen4 SSD, no external memory required, 2ch RAID0, compatible with random access.

The NVMe IP core is an IP core that interfaces next-generation storage PCIe SSDs, which serve as a replacement for SATA SSDs, with FPGAs without the need for a CPU or external memory. A reference design that operates on various Xilinx/Intel FPGA evaluation boards is included as standard, allowing development to start based on this reference design, enabling rapid product development. This NVMe IP core maximizes the performance of NVMe PCIe SSDs, achieving high-speed transfers of over 3300MB/s (evaluated with KCU105 and Samsung 970 Pro). Time-limited bit/sof files for various Xilinx/Intel FPGA boards are prepared, allowing performance evaluation on actual hardware before purchase.

  • ASIC
  • IP Cores

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SATA IP core for FPGA

SATA IP core for FPGA

High-performance, high-reliability IP core proven by NASA (National Aeronautics and Space Administration).

The Serial ATA (SATA) IP core complies with Serial ATA Revision 3.0 and is designed to operate on FPGA devices such as Xilinx UltraScale, 7 Series, and Intel 10 Series. This IP core provides only the link layer, but reference designs for the transport layer and physical layer are available, allowing connection to SATA3 hard disks without a PHY chip. This SATA IP core maximizes the performance of SSDs, enabling high-speed transfers exceeding 500MB/s per channel. Limited-time evaluation demo files for various FPGA boards are prepared, allowing performance evaluation on actual hardware before purchase. Additionally, the core product comes standard with reference designs that operate on various Xilinx/Intel FPGA evaluation boards, enabling development to start based on this reference design, which allows for rapid product development.

  • ASIC
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UDP 10G IP Core for FPGA

UDP 10G IP Core for FPGA

Achieving 10Gbps UDP communication functionality with pure hardware logic without CPU!

The 【UDP10G IP Core】 is a groundbreaking solution that allows UDP transmission and reception processing to be implemented solely with pure hardware logic, without the need for a CPU. It also supports high-speed simultaneous transmission and reception. This can help shorten the development time for network application products that require broadcasting and low latency. Additionally, we have prepared demo files for Xilinx/Intel FPGA evaluation boards, allowing you to evaluate and test this core on actual hardware before purchase.

  • ASIC
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25G TOE IP core for FPGA

25G TOE IP core for FPGA

Achieving 25G TCP/IP communication functionality with pure hardware logic without CPU!

The 25GbE TCP Offloading Engine IP Core (TOE25G-IP) is a groundbreaking solution that enables the complex TCP transmission and reception processes, which traditionally required expensive high-end CPUs, to be implemented solely with pure hardware logic without a CPU. It comes standard with a reference design compatible with Xilinx/Intel FPGAs, which can help shorten product development time. It provides 25G performance and bandwidth, which is 2.5 times that of the conventional 10G in a single channel. This significantly reduces power consumption and cost per gigabit.

  • ASIC
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TOE100G-IP core for FPGA

TOE100G-IP core for FPGA

Achieving 100G TCP/IP communication functionality with pure hardware logic without CPU!

The 100GbE TCP Offloading Engine IP Core (TOE100G-IP) is a groundbreaking solution that enables the implementation of complex TCP transmission and reception processes, which traditionally required expensive high-end CPUs, using only pure hardware logic without a CPU. It comes standard with a reference design compatible with Xilinx/Intel FPGAs, which can help shorten product development time.

  • ASIC
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LDPC IP core

LDPC IP core

We provide a total solution for LDPC codes, from system design and computer simulation evaluation to IP macros.

LDPC (Low Density Parity Check) symbols LDPC symbols have error correction capabilities that are extremely close to the Shannon limit, and they are error correction codes that enable high-speed processing of codes through parallel processing. Features of Mobile Tech's LDPC Symbol Total Solution We provide Encoder/Decoder IPs with optimal configurations based on the required performance (circuit scale/througput) that support standard LDPC codes as well as customer-specific LDPC codes, and we also design and support peripheral modules to maximize performance.

  • Other network tools
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IP Core Catalog

IP Core Catalog

Includes practical reference designs! A wide variety of lineups are available.

This catalog introduces the "IP cores" handled by Euresys Japan Co., Ltd. It includes various products such as the compact and customizable "GigE Vision IP core," the "USB3 Vision IP core" with practical reference designs, and the "CoaXPress IP core." Please use this for selecting products. 【Featured Products (partial)】 ■ CoaXPress-over-Fiber Bridge IP core ■ GigE Vision IP core ■ USB3 Vision IP core ■ CoaXPress IP core ■ IMX Pregius IP core, etc. *For more details, please refer to the PDF document or feel free to contact us.

  • Other production and development software and systems
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FPGA CoaXPress device IP core

FPGA CoaXPress device IP core

Provides a series of IP cores and development frameworks to build an FPGA-based transmitter!

We would like to introduce the "CoaXPress Device IP Core for FPGA" that we handle. CoaXPress (CXP) is a standard communication protocol for vision applications that uses widely used coaxial cables, facilitating the connection between cameras and frame grabbers, and supports standard GenICam software. It is compatible with AMD 7 series and Intel Cyclone 10 devices. It also has provisional compatibility with Microchip PolarFire, is compact and customizable. It supports link speeds from 1 Gbps to over 50 Gbps and comes with practical reference designs. 【Overview】 ■ Compatible with AMD 7 series and Intel Cyclone 10 devices ■ Provisional compatibility with Microchip PolarFire ■ Compact and customizable ■ Supports link speeds from 1 Gbps to over 50 Gbps ■ Comes with practical reference designs *For more details, please download the PDF or feel free to contact us.

  • Other electronic parts
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Northwest Logic's IP cores for FPGA and ASIC.

Northwest Logic's IP cores for FPGA and ASIC.

Achieving high performance and high quality of standalone controller IP cores, in collaboration with PHY IP vendors and verification IP vendors!

Northwest Logic has been providing controller IP cores focused on memory interfaces, MIPI, and PCI Express since its establishment in 1995. For memory interfaces, we offer a wide range of controllers including HBM2, DDR4/3, and LPDDR4, as well as CSI-2 and DSI-2/DSI for MIPI, and Gen4/3 for PCI Express. Our customizable IP cores are equipped with the full functionality of each protocol and are compatible with both ASIC and FPGA platforms. In addition to achieving high performance and quality for standalone controller IP cores through extensive simulation and hardware verification, we also focus on collaboration with PHY IP vendors and verification IP vendors, enabling us to provide total solutions for customers looking to integrate memory interfaces, MIPI, and PCI Express functionalities into their systems. *For more details, please refer to the PDF materials or feel free to contact us.

  • Other network tools
  • Other embedded systems (software and hardware)
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SATA Device ADCI IP Core for FPGA and ASIC

SATA Device ADCI IP Core for FPGA and ASIC

Supports power modes (partial/slumber)! The DATA interface uses FIFO.

We would like to introduce our "FPGA/ASIC IP Core for SATA Device ADCI." This is an IP core for SATA devices that complies with the SATA 3.3 standard and supports a maximum transfer rate of 6Gbps (600MB/s). It features an ADCI (Advanced Device Controller Interface) that allows for easy operation via processors/firmware, making it suitable for a wide range of SATA storage device solutions. 【Specifications (Excerpt)】 ■ Complies with SATA Revision 3.3 standard (1.5Gbps, 3.0Gbps, 6.0Gbps) ■ Supports Application layer, Transport layer, Link layer, and Phy layer, including ADCI ■ Supports OOB (Out of Band) ■ Uses FIFO for DATA interface *For more details, please download the PDF or feel free to contact us.

  • ASIC
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SATA RAID IP Core for FPGA and ASIC

SATA RAID IP Core for FPGA and ASIC

Fully compliant with SATA industry specifications! Operates with drives that are multiples of 2.

The "IP Core for SATA RAID for FPGA/ASIC" provides RAID 0 (striping and concatenation) and splits data across multiple storage endpoints to achieve higher system storage performance. It is designed to operate with extremely low latency during data transfers between SATA storage devices and backend data interfaces. This can be used for RAID 0 storage solutions that require high speed and large capacity. 【Specifications (excerpt)】 - Supports RAID 0 (striping and concatenation) - Operates with an even number of drives - SATA transfer rates: 1.5Gbps, 3.0Gbps, and 6.0Gbps (supports automatic speed negotiation) *For more details, please download the PDF or feel free to contact us.

  • ASIC
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NVMe Host Accelerator IP Core

NVMe Host Accelerator IP Core

It is an application layer equipped with an interface to the processor!

We would like to introduce the "NVMe Host Accelerator IP Core" that we handle. This product is an NVMe host IP core from IntelliProp that complies with the NVMe 1.4 specification and operates on PCIe 4.0 (8Gbps) with 8 lanes. It also features queuing and issuing capabilities for NVMe commands, allowing you to use it as a solution for high-speed data access to NVMe target devices. 【Specifications (excerpt)】 ■ Compliant with NVM Express 1.4 specification ■ Supports automatic initialization using PCIe hard blocks ■ Compatible with third-party PCIe Root Complex IP cores ■ Number of queues is adjustable (up to 64K) ■ Maximum data buffer size of 1GB *For more details, please download the PDF or feel free to contact us.

  • ASIC
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NVMe-to-NVMe Bridge

NVMe-to-NVMe Bridge

Supports automatic initialization using PCIe hard blocks!

The "NVMe-to-NVMe Bridge" is an NVMe bridge IP core that creates an NVMe protocol bridge using NVMe Host IP cores and NVMe Target IP cores. In this architecture, a sandbox area is implemented in the bridge, allowing for the implementation of custom logic and firmware. It can be used for purposes such as LBA remapping, data encryption, data compression, and endpoint aggregation. 【Specifications】 ■ Compliant with NVM Express 1.4 standard ■ Compatible with third-party PCIe Root Complex IP cores ■ Supports automatic initialization using PCIe hard blocks ■ Automated command transmission and completion ■ Application layer with an interface to the processor *For more details, please download the PDF or feel free to contact us.

  • ASIC
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AES-GCM Encryption IP Core

AES-GCM Encryption IP Core

Multiple independent data streams! You can choose the AES encryption key from 128 or 256 bits.

We would like to introduce the 'AES-GCM Encryption IP Core' that we handle. This is an AES-GCM (Galois Counter Mode) encryption IP core that enables users to perform encryption/decryption and authentication of packets or data streams. It supports AES-GCM encryption levels of 128 or 256 bits and is capable of data throughput supporting SATA 6Gbps, SAS 12Gbps, PCIe (NVMe) Gen4 x4 lanes, and Ethernet 10Gbps and 25Gbps. 【Specifications】 ■ AES encryption key selectable from 128 or 256 bits ■ Internal Hamming ECC protection/correction for internal memory ■ Multiple independent data streams ■ Key expansion caching to optimize packet performance ■ Packet queuing for optimal throughput *For more details, please download the PDF or feel free to contact us.

  • ASIC
  • IP Cores

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